Harshavardhan Kaushikkar

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bandwidth-aware fabric traffic shaping
- Patent number 12,039,169
- Issue date Jul 16, 2024
- Apple Inc.
- Anjana Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable system on a chip
- Patent number 12,007,895
- Issue date Jun 11, 2024
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable cache coherency protocol
- Patent number 11,947,457
- Issue date Apr 2, 2024
- Apple Inc.
- James Vash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ensuring transactional ordering in I/O agent
- Patent number 11,941,428
- Issue date Mar 26, 2024
- Apple Inc.
- Sagi Lahav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable system on a chip
- Patent number 11,934,313
- Issue date Mar 19, 2024
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable cache coherency protocol
- Patent number 11,868,258
- Issue date Jan 9, 2024
- Apple Inc.
- James Vash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication channels with both shared and independent resources
- Patent number 11,824,795
- Issue date Nov 21, 2023
- Rohit K. Gupta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Scalable system on a chip
- Patent number 11,803,471
- Issue date Oct 31, 2023
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable interface circuit
- Patent number 11,755,489
- Issue date Sep 12, 2023
- Apple Inc.
- Rohit K. Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address hashing in a multiple memory controller system
- Patent number 11,693,585
- Issue date Jul 4, 2023
- Apple Inc.
- Steven Fishwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple independent on-chip interconnect
- Patent number 11,675,722
- Issue date Jun 13, 2023
- Apple Inc.
- Sergio Kolor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
I/O agent
- Patent number 11,550,716
- Issue date Jan 10, 2023
- Apple Inc.
- Gaurav Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable cache coherency protocol
- Patent number 11,544,193
- Issue date Jan 3, 2023
- Apple Inc.
- James Vash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter cluster snoop latency reduction
- Patent number 11,537,538
- Issue date Dec 27, 2022
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resource access management
- Patent number 11,275,616
- Issue date Mar 15, 2022
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel coherence and memory cache processing pipelines
- Patent number 11,138,111
- Issue date Oct 5, 2021
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing memory cache control command hops on a fabric
- Patent number 11,030,102
- Issue date Jun 8, 2021
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter cluster snoop latency reduction
- Patent number 11,016,913
- Issue date May 25, 2021
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for providing distributed global ordering
- Patent number 10,877,888
- Issue date Dec 29, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor to memory with coherency bypass
- Patent number 10,802,968
- Issue date Oct 13, 2020
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for ensuring real-time snoop latency
- Patent number 10,795,818
- Issue date Oct 6, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coherence flows for dual-processing pipelines
- Patent number 10,678,691
- Issue date Jun 9, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for performing a memory resource retry
- Patent number 10,642,740
- Issue date May 5, 2020
- Apple Inc.
- Bikram Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Real-time resource handling in resource retry queue
- Patent number 10,417,146
- Issue date Sep 17, 2019
- Apple Inc.
- Sridhar Kotha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication queue management system
- Patent number 10,298,511
- Issue date May 21, 2019
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communications fabric with split paths for control and data packets
- Patent number 10,206,175
- Issue date Feb 12, 2019
- Apple Inc.
- Munetoshi Fukami
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods of overriding a resource retry
- Patent number 10,169,235
- Issue date Jan 1, 2019
- Apple Inc.
- Bikram Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for performing a memory resource retry
- Patent number 9,990,294
- Issue date Jun 5, 2018
- Apple Inc.
- Bikram Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communications fabric with split paths for control and data packets
- Patent number 9,860,841
- Issue date Jan 2, 2018
- Apple Inc.
- Munetoshi Fukami
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Credit lookahead mechanism
- Patent number 9,524,261
- Issue date Dec 20, 2016
- Apple Inc.
- Gurjeet S. Saund
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Scalable System on a Chip
- Publication number 20240411695
- Publication date Dec 12, 2024
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable System on a Chip
- Publication number 20240370371
- Publication date Nov 7, 2024
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable Cache Coherency Protocol
- Publication number 20240273024
- Publication date Aug 15, 2024
- Apple Inc.
- James Vash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Address Hashing in a Multiple Memory Controller System
- Publication number 20230367510
- Publication date Nov 16, 2023
- Apple Inc.
- Steven Fishwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple Independent On-chip Interconnect
- Publication number 20230350828
- Publication date Nov 2, 2023
- Apple Inc.
- Sergio Kolor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bandwidth-Aware Fabric Traffic Shaping
- Publication number 20230325086
- Publication date Oct 12, 2023
- Apple Inc.
- Anjana Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable Cache Coherency Protocol
- Publication number 20230169003
- Publication date Jun 1, 2023
- Apple Inc.
- James Vash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
I/O Agent
- Publication number 20230161700
- Publication date May 25, 2023
- Apple Inc.
- Gaurav Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable Cache Coherency Protocol
- Publication number 20230083397
- Publication date Mar 16, 2023
- Apple Inc.
- James Vash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable Interface Circuit
- Publication number 20230064369
- Publication date Mar 2, 2023
- Apple Inc.
- Rohit K. Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Communication Channels with both Shared and Independent Resources
- Publication number 20230064187
- Publication date Mar 2, 2023
- Apple Inc.
- Rohit K. Gupta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Ensuring Transactional Ordering in I/O Agent
- Publication number 20230064526
- Publication date Mar 2, 2023
- Apple Inc.
- Sagi Lahav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Counters For Ensuring Transactional Ordering in I/O Agent
- Publication number 20230063676
- Publication date Mar 2, 2023
- Apple Inc.
- Sagi Lahav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable System on a Chip
- Publication number 20230053530
- Publication date Feb 23, 2023
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable System on a Chip
- Publication number 20230058989
- Publication date Feb 23, 2023
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable System on a Chip
- Publication number 20230056044
- Publication date Feb 23, 2023
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
I/O Agent
- Publication number 20220318136
- Publication date Oct 6, 2022
- Apple Inc.
- Gaurav Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Inter Cluster Snoop Latency Reduction
- Publication number 20210303486
- Publication date Sep 30, 2021
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESOURCE ACCESS MANAGEMENT
- Publication number 20200394070
- Publication date Dec 17, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENCE FLOWS FOR DUAL-PROCESSING PIPELINES
- Publication number 20200081840
- Publication date Mar 12, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL COHERENCE AND MEMORY CACHE PROCESSING PIPELINES
- Publication number 20200081838
- Publication date Mar 12, 2020
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PROVIDING DISTRIBUTED GLOBAL ORDERING
- Publication number 20200081837
- Publication date Mar 12, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING MEMORY CACHE CONTROL COMMAND HOPS ON A FABRIC
- Publication number 20200081836
- Publication date Mar 12, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR PERFORMING A MEMORY RESOURCE RETRY
- Publication number 20180276128
- Publication date Sep 27, 2018
- Apple Inc.
- Bikram Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATIONS FABRIC WITH SPLIT PATHS FOR CONTROL AND DATA PACKETS
- Publication number 20180077649
- Publication date Mar 15, 2018
- Apple Inc.
- Munetoshi Fukami
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMMUNICATION QUEUE MANAGEMENT SYSTEM
- Publication number 20180063016
- Publication date Mar 1, 2018
- Apple Inc.
- Manu Gulati
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS FOR PERFORMING A MEMORY RESOURCE RETRY
- Publication number 20170242798
- Publication date Aug 24, 2017
- Apple Inc.
- Bikram Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF OVERRIDING A RESOURCE RETRY
- Publication number 20170168940
- Publication date Jun 15, 2017
- Apple Inc.
- Bikram Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATIONS FABRIC WITH SPLIT PATHS FOR CONTROL AND DATA PACKETS
- Publication number 20170055218
- Publication date Feb 23, 2017
- Apple Inc.
- Munetoshi Fukami
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PROCESSOR TO MEMORY BYPASS
- Publication number 20160328322
- Publication date Nov 10, 2016
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING

Harshavardhan Kaushikkar

Person

Patents Grantslast 30 patents

Bandwidth-aware fabric traffic shaping

Scalable system on a chip

Scalable cache coherency protocol

Ensuring transactional ordering in I/O agent

Scalable system on a chip

Scalable cache coherency protocol

Communication channels with both shared and independent resources

Scalable system on a chip

Configurable interface circuit

Address hashing in a multiple memory controller system

Multiple independent on-chip interconnect

I/O agent

Scalable cache coherency protocol

Inter cluster snoop latency reduction

Resource access management

Parallel coherence and memory cache processing pipelines

Reducing memory cache control command hops on a fabric

Inter cluster snoop latency reduction

Systems and methods for providing distributed global ordering

Processor to memory with coherency bypass

Method and apparatus for ensuring real-time snoop latency

Coherence flows for dual-processing pipelines

Methods for performing a memory resource retry

Real-time resource handling in resource retry queue

Communication queue management system

Communications fabric with split paths for control and data packets

Methods of overriding a resource retry

Methods for performing a memory resource retry

Communications fabric with split paths for control and data packets

Credit lookahead mechanism

Patents Applicationslast 30 patents

Scalable System on a Chip

Scalable System on a Chip

Scalable Cache Coherency Protocol

Address Hashing in a Multiple Memory Controller System

Multiple Independent On-chip Interconnect

Bandwidth-Aware Fabric Traffic Shaping

Scalable Cache Coherency Protocol

I/O Agent

Scalable Cache Coherency Protocol

Configurable Interface Circuit

Communication Channels with both Shared and Independent Resources

Ensuring Transactional Ordering in I/O Agent

Counters For Ensuring Transactional Ordering in I/O Agent

Scalable System on a Chip

Scalable System on a Chip

Scalable System on a Chip

I/O Agent

Inter Cluster Snoop Latency Reduction

RESOURCE ACCESS MANAGEMENT

COHERENCE FLOWS FOR DUAL-PROCESSING PIPELINES

PARALLEL COHERENCE AND MEMORY CACHE PROCESSING PIPELINES

SYSTEMS AND METHODS FOR PROVIDING DISTRIBUTED GLOBAL ORDERING

REDUCING MEMORY CACHE CONTROL COMMAND HOPS ON A FABRIC

METHODS FOR PERFORMING A MEMORY RESOURCE RETRY

COMMUNICATIONS FABRIC WITH SPLIT PATHS FOR CONTROL AND DATA PACKETS

COMMUNICATION QUEUE MANAGEMENT SYSTEM

METHODS FOR PERFORMING A MEMORY RESOURCE RETRY

METHODS OF OVERRIDING A RESOURCE RETRY

COMMUNICATIONS FABRIC WITH SPLIT PATHS FOR CONTROL AND DATA PACKETS

PROCESSOR TO MEMORY BYPASS