Haw-Jyh Liaw

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Technique for determining performance characteristics of electronic...
- Patent number 10,782,344
- Issue date Sep 22, 2020
- RAMBUS INC.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Technique for determining performance characteristics of electronic...
- Patent number 9,977,076
- Issue date May 22, 2018
- Rambus Inc.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Technique for determining performance characteristics of electronic...
- Patent number 9,562,934
- Issue date Feb 7, 2017
- Rambus Inc.
- Haw-Jyh Liaw
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatus for clock and data recovery using transmissio...
- Patent number 8,599,983
- Issue date Dec 3, 2013
- NetLogic Microsystems, Inc.
- Stefanos Sidiropoulos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technique for determining performance characteristics of electronic...
- Patent number 8,489,345
- Issue date Jul 16, 2013
- Rambus Inc.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module having signal lines configured for sequential arrival...
- Patent number 8,364,878
- Issue date Jan 29, 2013
- Rambus Inc.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module having signal lines configured for sequential arrival...
- Patent number 8,214,575
- Issue date Jul 3, 2012
- Rambus Inc.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for clock and data recovery using transmissio...
- Patent number 8,155,236
- Issue date Apr 10, 2012
- Netlogic Microsystems, Inc.
- Stefanos Sidiropoulos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatus for clock and data recovery using transmissio...
- Patent number 8,102,936
- Issue date Jan 24, 2012
- Netlogic Microsystems, Inc.
- Stefanos Sidiropoulos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technique for determining performance characteristics of electronic...
- Patent number 8,055,458
- Issue date Nov 8, 2011
- Rambus Inc.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module having signal lines configured for sequential arrival...
- Patent number 7,870,322
- Issue date Jan 11, 2011
- Rambus Inc.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for shaping electronic pulses
- Patent number 7,856,570
- Issue date Dec 21, 2010
- Netlogic Microsystems, Inc.
- Haw-Jyh Liaw
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technique for determining performance characteristics of electronic...
- Patent number 7,542,857
- Issue date Jun 2, 2009
- Rambus Inc.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module having memory devices on two sides
- Patent number 7,523,244
- Issue date Apr 21, 2009
- Rambus Inc.
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system having memory devices on two sides
- Patent number 7,523,246
- Issue date Apr 21, 2009
- Rambus Inc.
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module having a clock line and termination
- Patent number 7,523,247
- Issue date Apr 21, 2009
- Rambus Inc.
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system having a clock line and termination
- Patent number 7,519,757
- Issue date Apr 14, 2009
- Rambus Inc.
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-latency equalization in multi-level, multi-line communication s...
- Patent number 7,269,212
- Issue date Sep 11, 2007
- Rambus Inc.
- Pak Shing Chau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multilevel signal interface testing with binary test apparatus by e...
- Patent number 7,162,672
- Issue date Jan 9, 2007
- Rambus Inc.
- Carl W. Werner
- G11 - INFORMATION STORAGE
Information Patent Grant
Active impedance compensation
- Patent number 7,134,101
- Issue date Nov 7, 2006
- Rambus Inc.
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip-to-chip communication system using an ac-coupled bus and devic...
- Patent number 7,130,944
- Issue date Oct 31, 2006
- Rambus Inc.
- Donald V. Perino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High frequency bus system
- Patent number 7,085,872
- Issue date Aug 1, 2006
- Rambus, Inc.
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for determining performance characteristics of electronic...
- Patent number 7,006,932
- Issue date Feb 28, 2006
- Rambus Inc.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Technique for determining performance characteristics of electronic...
- Patent number 6,920,402
- Issue date Jul 19, 2005
- Rambus Inc.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit device having a capacitive coupling element
- Patent number 6,854,030
- Issue date Feb 8, 2005
- Rambus Inc.
- Donald V. Perino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Spread spectrum clocking of digital signals
- Patent number 6,687,319
- Issue date Feb 3, 2004
- Rambus Inc.
- Donald V. Perino
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for utilizing a lossy dielectric substrate in...
- Patent number 6,621,373
- Issue date Sep 16, 2003
- Rambus Inc.
- Donald R. Mullen
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Active impedance compensation
- Patent number 6,530,062
- Issue date Mar 4, 2003
- Rambus Inc.
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip-to-chip communication system using an ac-coupled bus and devic...
- Patent number 6,496,889
- Issue date Dec 17, 2002
- Rambus Inc.
- Donald V. Perino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for reducing clock signal phase skew in a mast...
- Patent number 6,426,984
- Issue date Jul 30, 2002
- Rambus Incorporated
- Donald V. Perino
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Technique for Determining Performance Characteristics Of Electronic...
- Publication number 20180335477
- Publication date Nov 22, 2018
- RAMBUS INC.
- Haw-Jyh Liaw
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Technique for Determining Performance Characteristics Of Electronic...
- Publication number 20170199242
- Publication date Jul 13, 2017
- RAMBUS INC.
- Haw-Jyh Liaw
- G01 - MEASURING TESTING
Information Patent Application
Technique for Determining Performance Characteristics Of Electronic...
- Publication number 20140070819
- Publication date Mar 13, 2014
- Haw-Jyh Liaw
- G01 - MEASURING TESTING
Information Patent Application
METHODS AND APPARATUS FOR CLOCK AND DATA RECOVERY USING TRANSMISSIO...
- Publication number 20120230450
- Publication date Sep 13, 2012
- Stefanos Sidiropoulos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory Module Having Signal Lines Configured for Sequential Arrival...
- Publication number 20120144085
- Publication date Jun 7, 2012
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR DETERMINING PERFORMANCE CHARACTERISTICS OF ELECTRONIC...
- Publication number 20120072153
- Publication date Mar 22, 2012
- RAMBUS INC.
- Haw-Jyh Liaw
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory Module Having Signal Lines Configured for Sequential Arrival...
- Publication number 20110090727
- Publication date Apr 21, 2011
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Shaping Electronic Pulses
- Publication number 20100188128
- Publication date Jul 29, 2010
- Haw-Jyh Liaw
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUE FOR DETERMINING PERFORMANCE CHARACTERISTICS OF ELECTRONIC...
- Publication number 20090240448
- Publication date Sep 24, 2009
- RAMBUS INC.
- Haw-Jyh Liaw
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory Module Having Signal Lines Configured for Sequential Arrival...
- Publication number 20090210604
- Publication date Aug 20, 2009
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods And Apparatus For Clock And Data Recovery Using Transmissio...
- Publication number 20080049850
- Publication date Feb 28, 2008
- Stefanos Sidiropoulos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory System Having a Clock Line and Termination
- Publication number 20070216800
- Publication date Sep 20, 2007
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Module Having a Clock Line and Termination
- Publication number 20070156943
- Publication date Jul 5, 2007
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory System Having Memory Devices on Two Sides
- Publication number 20070150635
- Publication date Jun 28, 2007
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Module Having a Clock Line and Termination
- Publication number 20070150636
- Publication date Jun 28, 2007
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Frequency Bus System
- Publication number 20060277345
- Publication date Dec 7, 2006
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique for determining performance characteristics of electronic...
- Publication number 20060136153
- Publication date Jun 22, 2006
- RAMBUS INC.
- Haw-Jyh Liaw
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High frequency bus system
- Publication number 20050246471
- Publication date Nov 3, 2005
- Rambus Inc.
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Chip-to-chip communication system using an ac-coupled bus and devic...
- Publication number 20050135182
- Publication date Jun 23, 2005
- Donald V. Perino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High frequency bus system
- Publication number 20040221083
- Publication date Nov 4, 2004
- Rambus Inc.
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Active impedance compensation
- Publication number 20030110454
- Publication date Jun 12, 2003
- Rambus, Inc.
- Haw-Jyh Liaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuit device having a capacitive coupling element
- Publication number 20030105908
- Publication date Jun 5, 2003
- Donald V. Perino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multilevel signal interface testing with binary test apparatus by e...
- Publication number 20030093713
- Publication date May 15, 2003
- Carl W. Werner
- G01 - MEASURING TESTING

Haw-Jyh Liaw

Person

Patents Grantslast 30 patents

Technique for determining performance characteristics of electronic...

Technique for determining performance characteristics of electronic...

Technique for determining performance characteristics of electronic...

Methods and apparatus for clock and data recovery using transmissio...

Technique for determining performance characteristics of electronic...

Memory module having signal lines configured for sequential arrival...

Memory module having signal lines configured for sequential arrival...

Methods and apparatus for clock and data recovery using transmissio...

Methods and apparatus for clock and data recovery using transmissio...

Technique for determining performance characteristics of electronic...

Memory module having signal lines configured for sequential arrival...

Method and apparatus for shaping electronic pulses

Technique for determining performance characteristics of electronic...

Memory module having memory devices on two sides

Memory system having memory devices on two sides

Memory module having a clock line and termination

Memory system having a clock line and termination

Low-latency equalization in multi-level, multi-line communication s...

Multilevel signal interface testing with binary test apparatus by e...

Active impedance compensation

Chip-to-chip communication system using an ac-coupled bus and devic...

High frequency bus system

Technique for determining performance characteristics of electronic...

Technique for determining performance characteristics of electronic...

Integrated circuit device having a capacitive coupling element

Spread spectrum clocking of digital signals

Apparatus and method for utilizing a lossy dielectric substrate in...

Active impedance compensation

Chip-to-chip communication system using an ac-coupled bus and devic...

Apparatus and method for reducing clock signal phase skew in a mast...

Patents Applicationslast 30 patents

Technique for Determining Performance Characteristics Of Electronic...

Technique for Determining Performance Characteristics Of Electronic...

Technique for Determining Performance Characteristics Of Electronic...

METHODS AND APPARATUS FOR CLOCK AND DATA RECOVERY USING TRANSMISSIO...

Memory Module Having Signal Lines Configured for Sequential Arrival...

TECHNIQUE FOR DETERMINING PERFORMANCE CHARACTERISTICS OF ELECTRONIC...

Memory Module Having Signal Lines Configured for Sequential Arrival...

Method and Apparatus for Shaping Electronic Pulses

TECHNIQUE FOR DETERMINING PERFORMANCE CHARACTERISTICS OF ELECTRONIC...

Memory Module Having Signal Lines Configured for Sequential Arrival...

Methods And Apparatus For Clock And Data Recovery Using Transmissio...

Memory System Having a Clock Line and Termination

Memory Module Having a Clock Line and Termination

Memory System Having Memory Devices on Two Sides

Memory Module Having a Clock Line and Termination

High Frequency Bus System

Technique for determining performance characteristics of electronic...

High frequency bus system

Chip-to-chip communication system using an ac-coupled bus and devic...

High frequency bus system

Active impedance compensation

Integrated circuit device having a capacitive coupling element

Multilevel signal interface testing with binary test apparatus by e...