HeeJo Chi

Person

Yeoju-gun, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of forming interposer with opening...
- Patent number 11,688,612
- Issue date Jun 27, 2023
- STATS ChipPAC Pte. Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of using leadframe bodies to form o...
- Patent number 10,903,183
- Issue date Jan 26, 2021
- JCET Semiconductor (Shaoxing) Co., Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming ultra thin multi-die fac...
- Patent number 10,573,600
- Issue date Feb 25, 2020
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor device and method of forming 3D dual side die embedde...
- Patent number 10,510,703
- Issue date Dec 17, 2019
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming interposer frame electri...
- Patent number 9,966,335
- Issue date May 8, 2018
- STATS ChipPAC Pte. Ltd.
- NamJu Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming interposer with opening...
- Patent number 9,875,911
- Issue date Jan 23, 2018
- STATS ChipPAC Pte. Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with under bump metallization a...
- Patent number 9,865,554
- Issue date Jan 9, 2018
- STATS ChipPAC Ptc. Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming conductive and insulating layers
- Patent number 9,865,575
- Issue date Jan 9, 2018
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with interposer support structu...
- Patent number 9,859,200
- Issue date Jan 2, 2018
- STATS ChipPAC Pte. Ltd.
- SooSan Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming vertical interconnect in...
- Patent number 9,842,808
- Issue date Dec 12, 2017
- STATS ChipPAC Pte. Ltd.
- HanGil Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with joint assembly and method...
- Patent number 9,748,157
- Issue date Aug 29, 2017
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming ultra thin multi-die fac...
- Patent number 9,735,113
- Issue date Aug 15, 2017
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of bonding semiconductor die to sub...
- Patent number 9,721,921
- Issue date Aug 1, 2017
- STATS ChipPAC Pte. Ltd.
- KyungMoon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming 3D dual side die embedde...
- Patent number 9,691,707
- Issue date Jun 27, 2017
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with photoimagable dielectric-d...
- Patent number 9,679,769
- Issue date Jun 13, 2017
- STATS ChipPAC Pte. Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with coreless substrate and met...
- Patent number 9,673,171
- Issue date Jun 6, 2017
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with thin profile WLCSP with vertical intercon...
- Patent number 9,558,965
- Issue date Jan 31, 2017
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming conductive jumper traces
- Patent number 9,508,635
- Issue date Nov 29, 2016
- STATS ChipPAC Pte. Ltd.
- HanGil Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with support structure and meth...
- Patent number 9,502,267
- Issue date Nov 22, 2016
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Carrier system with multi-tier conductive posts and method of manuf...
- Patent number 9,496,152
- Issue date Nov 15, 2016
- STATS ChipPAC Pte. Ltd.
- NamJu Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with photoimagable dielectric-d...
- Patent number 9,406,531
- Issue date Aug 2, 2016
- STATS ChipPAC Pte. Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming conductive and insulating layers
- Patent number 9,406,533
- Issue date Aug 2, 2016
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with insulated trace and method...
- Patent number 9,406,642
- Issue date Aug 2, 2016
- Stats Chippac Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming pre-molded semiconductor...
- Patent number 9,397,050
- Issue date Jul 19, 2016
- STATS ChipPAC Pte. Ltd.
- HanGil Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming 3D semiconductor package...
- Patent number 9,391,046
- Issue date Jul 12, 2016
- STATS ChipPAC Pte. Ltd.
- Yeonglm Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with surface treatment and meth...
- Patent number 9,385,100
- Issue date Jul 5, 2016
- STATS ChipPAC Pte. Ltd.
- Hun Teak Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming 3D dual side die embedde...
- Patent number 9,362,161
- Issue date Jun 7, 2016
- STATS ChipPAC, Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package stacking system with shielding and metho...
- Patent number 9,355,939
- Issue date May 31, 2016
- Stats Chippac Ltd.
- NamJu Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with pre-molded leadframe and m...
- Patent number 9,331,003
- Issue date May 3, 2016
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming RDL and vertical interco...
- Patent number 9,330,994
- Issue date May 3, 2016
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Forming Interposer with Opening...
- Publication number 20180108542
- Publication date Apr 19, 2018
- STATS ChipPAC Pte Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Ultra Thin Multi-Die Fac...
- Publication number 20170309572
- Publication date Oct 26, 2017
- STATS ChipPAC Pte Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming 3D Dual Side Die Embedde...
- Publication number 20170250154
- Publication date Aug 31, 2017
- STATS ChipPAC Pte Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming Conductive and Insulating Layers
- Publication number 20160329310
- Publication date Nov 10, 2016
- STATS ChipPAC Pte Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming 3D Dual Side Die Embedde...
- Publication number 20160233168
- Publication date Aug 11, 2016
- STATS ChipPAC, Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE MECHANI...
- Publication number 20160190056
- Publication date Jun 30, 2016
- SooSan Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER SUPPORT STRUCTU...
- Publication number 20160190054
- Publication date Jun 30, 2016
- SooSan Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Bonding Semiconductor Die to Sub...
- Publication number 20160163675
- Publication date Jun 9, 2016
- STATS ChipPAC, Ltd.
- KyungMoon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDER BUMP METALLIZATION A...
- Publication number 20160099222
- Publication date Apr 7, 2016
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming RDL and Vertical Interco...
- Publication number 20150279778
- Publication date Oct 1, 2015
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming 3D Dual Side Die Embedde...
- Publication number 20150270237
- Publication date Sep 24, 2015
- STATS ChipPAC, Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Interposer Frame Electri...
- Publication number 20150123273
- Publication date May 7, 2015
- STATS ChipPAC, Ltd.
- NamJu Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Making an Embedded Wafer Level B...
- Publication number 20150091157
- Publication date Apr 2, 2015
- STATS ChipPAC, Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming Conductive Materials on Contact Pads
- Publication number 20150004750
- Publication date Jan 1, 2015
- STATS ChipPAC, Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming Conductive Jumper Traces
- Publication number 20150004748
- Publication date Jan 1, 2015
- STATS ChipPAC, Ltd.
- HanGil Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming Conductive and Insulating Layers
- Publication number 20150004756
- Publication date Jan 1, 2015
- STATS ChipPAC, Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Making an Embedded Wafer Level B...
- Publication number 20140367848
- Publication date Dec 18, 2014
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Using Leadframe Bodies to Form O...
- Publication number 20140361423
- Publication date Dec 11, 2014
- STATS ChipPAC, Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Manufacturing Flip Chip Semiconductor Packages Using Dou...
- Publication number 20140295618
- Publication date Oct 2, 2014
- STATS ChipPAC, Ltd.
- KyungMoon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Making Bumpless Flipchip Interco...
- Publication number 20140175661
- Publication date Jun 26, 2014
- STATS ChipPAC, Ltd.
- KyungMoon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Simultaneous Molding and Thermal...
- Publication number 20140175639
- Publication date Jun 26, 2014
- STATS ChipPAC, Ltd.
- KyungMoon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Bonding Semiconductor Die to Sub...
- Publication number 20140175640
- Publication date Jun 26, 2014
- STATS ChipPAC, Ltd.
- KyungMoon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THROUGH SILICON VIA AND ME...
- Publication number 20130334697
- Publication date Dec 19, 2013
- HanGil Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Open Cavity in TSV Inter...
- Publication number 20130299974
- Publication date Nov 14, 2013
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Interposer with Opening...
- Publication number 20130299982
- Publication date Nov 14, 2013
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Conductive Layer Over Me...
- Publication number 20130249104
- Publication date Sep 26, 2013
- STATS ChipPAC, Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Conductive Posts and Hea...
- Publication number 20130105970
- Publication date May 2, 2013
- STATS ChipPAC, Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Interposer Frame Electri...
- Publication number 20130099378
- Publication date Apr 25, 2013
- STATS ChipPAC, Ltd.
- NamJu Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Prefabricated Multi-Die...
- Publication number 20130087898
- Publication date Apr 11, 2013
- STATS ChipPAC, Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD O...
- Publication number 20130075923
- Publication date Mar 28, 2013
- YeongIm Park
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Semiconductor device and method of forming interposer with opening...

Semiconductor device and method of using leadframe bodies to form o...

Semiconductor device and method of forming ultra thin multi-die fac...

Semiconductor device and method of forming 3D dual side die embedde...

Semiconductor device and method of forming interposer frame electri...

Semiconductor device and method of forming interposer with opening...

Integrated circuit packaging system with under bump metallization a...

Methods of forming conductive and insulating layers

Integrated circuit packaging system with interposer support structu...

Semiconductor device and method of forming vertical interconnect in...

Integrated circuit packaging system with joint assembly and method...

Semiconductor device and method of forming ultra thin multi-die fac...

Semiconductor device and method of bonding semiconductor die to sub...

Semiconductor device and method of forming 3D dual side die embedde...

Integrated circuit packaging system with photoimagable dielectric-d...

Integrated circuit packaging system with coreless substrate and met...

Semiconductor device with thin profile WLCSP with vertical intercon...

Methods of forming conductive jumper traces

Integrated circuit packaging system with support structure and meth...

Carrier system with multi-tier conductive posts and method of manuf...

Integrated circuit packaging system with photoimagable dielectric-d...

Methods of forming conductive and insulating layers

Integrated circuit packaging system with insulated trace and method...

Semiconductor device and method of forming pre-molded semiconductor...

Semiconductor device and method of forming 3D semiconductor package...

Integrated circuit packaging system with surface treatment and meth...

Semiconductor device and method of forming 3D dual side die embedde...

Integrated circuit package stacking system with shielding and metho...

Integrated circuit packaging system with pre-molded leadframe and m...

Semiconductor device and method of forming RDL and vertical interco...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Forming Interposer with Opening...

Semiconductor Device and Method of Forming Ultra Thin Multi-Die Fac...

Semiconductor Device and Method of Forming 3D Dual Side Die Embedde...

Methods of Forming Conductive and Insulating Layers

Semiconductor Device and Method of Forming 3D Dual Side Die Embedde...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE MECHANI...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER SUPPORT STRUCTU...

Semiconductor Device and Method of Bonding Semiconductor Die to Sub...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDER BUMP METALLIZATION A...

Semiconductor Device and Method of Forming RDL and Vertical Interco...

Semiconductor Device and Method of Forming 3D Dual Side Die Embedde...

Semiconductor Device and Method of Forming Interposer Frame Electri...

Semiconductor Device and Method of Making an Embedded Wafer Level B...

Methods of Forming Conductive Materials on Contact Pads

Methods of Forming Conductive Jumper Traces

Methods of Forming Conductive and Insulating Layers

Semiconductor Device and Method of Making an Embedded Wafer Level B...

Semiconductor Device and Method of Using Leadframe Bodies to Form O...

Methods of Manufacturing Flip Chip Semiconductor Packages Using Dou...

Semiconductor Device and Method of Making Bumpless Flipchip Interco...

Semiconductor Device and Method of Simultaneous Molding and Thermal...

Semiconductor Device and Method of Bonding Semiconductor Die to Sub...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THROUGH SILICON VIA AND ME...

Semiconductor Device and Method of Forming Open Cavity in TSV Inter...

Semiconductor Device and Method of Forming Interposer with Opening...

Semiconductor Device and Method of Forming Conductive Layer Over Me...

Semiconductor Device and Method of Forming Conductive Posts and Hea...

Semiconductor Device and Method of Forming Interposer Frame Electri...

Semiconductor Device and Method of Forming Prefabricated Multi-Die...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD O...