Heike Berthold

Person

Hirschfeld, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Method for selectively removing a spacer in a dual stress liner app...
- Patent number 9,006,114
- Issue date Apr 14, 2015
- Advanced Micro Devices, Inc.
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-K gate electrode structure formed after transistor fabrication...
- Patent number 8,883,582
- Issue date Nov 11, 2014
- Advanced Micro Devices, Inc.
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress reduction in chip packaging by a stress compensation region...
- Patent number 8,497,583
- Issue date Jul 30, 2013
- GLOBALFOUNDRIES Inc.
- Dmytro Chumakov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-K gate electrode structure formed after transistor fabrication...
- Patent number 8,470,661
- Issue date Jun 25, 2013
- Advanced Micro Devices, Inc.
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Threshold adjustment for MOS devices by adapting a spacer width pri...
- Patent number 8,440,534
- Issue date May 14, 2013
- Advanced Micro Devices, Inc.
- Uwe Griebenow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for adjusting the height of a gate electrode in a semiconduc...
- Patent number 8,361,844
- Issue date Jan 29, 2013
- GLOBALFOUNDRIES Inc.
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double deposition of a stress-inducing layer in an interlayer diele...
- Patent number 8,349,744
- Issue date Jan 8, 2013
- Advanced Micro Devices, Inc.
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HIGH-K GATE ELECTRODE STRUCTURE FORMED AFTER TRANSISTOR FABRICATION...
- Publication number 20130252409
- Publication date Sep 26, 2013
- Advanced Micro Devices, Inc.
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stress Reduction in Chip Packaging by a Stress Compensation Region...
- Publication number 20110291299
- Publication date Dec 1, 2011
- GLOBALFOUNDRIES INC.
- Dmytro Chumakov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THRESHOLD ADJUSTMENT FOR MOS DEVICES BY ADAPTING A SPACER WIDTH PRI...
- Publication number 20110223732
- Publication date Sep 15, 2011
- Advanced Micro Devices, Inc.
- Uwe Griebenow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR ADJUSTING THE HEIGHT OF A GATE ELECTRODE IN A SEMICONDUC...
- Publication number 20100190309
- Publication date Jul 29, 2010
- GLOBALFOUNDRIES INC.
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH-K GATE ELECTRODE STRUCTURE FORMED AFTER TRANSISTOR FABRICATION...
- Publication number 20100133628
- Publication date Jun 3, 2010
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Threshold adjustment for MOS devices by adapting a spacer width pri...
- Publication number 20090321850
- Publication date Dec 31, 2009
- Uwe Griebenow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR SELECTIVELY REMOVING A SPACER IN A DUAL STRESS LINER APP...
- Publication number 20090273035
- Publication date Nov 5, 2009
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOUBLE DEPOSITION OF A STRESS-INDUCING LAYER IN AN INTERLAYER DIELE...
- Publication number 20090243049
- Publication date Oct 1, 2009
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR ADJUSTING THE HEIGHT OF A GATE ELECTRODE IN A SEMICONDUC...
- Publication number 20090108336
- Publication date Apr 30, 2009
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS

Heike Berthold

Person

Patents Grantslast 30 patents

Method for selectively removing a spacer in a dual stress liner app...

High-K gate electrode structure formed after transistor fabrication...

Stress reduction in chip packaging by a stress compensation region...

High-K gate electrode structure formed after transistor fabrication...

Threshold adjustment for MOS devices by adapting a spacer width pri...

Method for adjusting the height of a gate electrode in a semiconduc...

Double deposition of a stress-inducing layer in an interlayer diele...

Patents Applicationslast 30 patents

HIGH-K GATE ELECTRODE STRUCTURE FORMED AFTER TRANSISTOR FABRICATION...

Stress Reduction in Chip Packaging by a Stress Compensation Region...

THRESHOLD ADJUSTMENT FOR MOS DEVICES BY ADAPTING A SPACER WIDTH PRI...

METHOD FOR ADJUSTING THE HEIGHT OF A GATE ELECTRODE IN A SEMICONDUC...

HIGH-K GATE ELECTRODE STRUCTURE FORMED AFTER TRANSISTOR FABRICATION...

Threshold adjustment for MOS devices by adapting a spacer width pri...

METHOD FOR SELECTIVELY REMOVING A SPACER IN A DUAL STRESS LINER APP...

DOUBLE DEPOSITION OF A STRESS-INDUCING LAYER IN AN INTERLAYER DIELE...

METHOD FOR ADJUSTING THE HEIGHT OF A GATE ELECTRODE IN A SEMICONDUC...