Helmut Kandolf

Person

Munchen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Hub chip for one or more memory modules
- Patent number 7,191,276
- Issue date Mar 13, 2007
- Infineon Technologies AG
- Sven Kalms
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Magnetic memory configuration
- Patent number 6,816,406
- Issue date Nov 9, 2004
- Infineon Technologies AG
- Heinz Hönigschmid
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory with memory cell array
- Patent number 6,657,916
- Issue date Dec 2, 2003
- Infineon Technologies AG
- Heinz Hönigschmid
- G11 - INFORMATION STORAGE
Information Patent Grant
Configuration and method for the low-loss writing of an MRAM
- Patent number 6,639,829
- Issue date Oct 28, 2003
- Infineon Technologies AG
- Dietmar Gogl
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having row and column redundancy circui...
- Patent number 6,618,306
- Issue date Sep 9, 2003
- Infineon Technologies AG
- Thomas Böhm
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit configuration for controlling write and read operations in...
- Patent number 6,577,528
- Issue date Jun 10, 2003
- Infineon Technologies AG
- Dietmar Gogl
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated semiconductor memory having memory cells with a ferroele...
- Patent number 6,515,890
- Issue date Feb 4, 2003
- Infineon Technologies AG
- Robert Esterl
- G11 - INFORMATION STORAGE
Information Patent Grant
MRAM configuration
- Patent number 6,473,335
- Issue date Oct 29, 2002
- Infineon Technologies AG
- Thomas Böhm
- G11 - INFORMATION STORAGE
Information Patent Grant
Configuration for implementing redundancy for a memory chip
- Patent number 6,459,631
- Issue date Oct 1, 2002
- Infineon Technologies AG
- Helmut Fischer
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for operating an integrated memory
- Patent number 6,445,607
- Issue date Sep 3, 2002
- Infineon Technologies AG
- Robert Esterl
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Hub chip for one or more memory modules
- Publication number 20050027923
- Publication date Feb 3, 2005
- Sven Kalms
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Magnetic memory configuration
- Publication number 20040100836
- Publication date May 27, 2004
- Heinz Honigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
Digital memory circuit and method of manufacturing the circuit
- Publication number 20030039157
- Publication date Feb 27, 2003
- Thomas Bohm
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory
- Publication number 20020116591
- Publication date Aug 22, 2002
- Heinz Honigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit configuration for controlling write and read operations in...
- Publication number 20020080661
- Publication date Jun 27, 2002
- Dietmar Gogl
- G11 - INFORMATION STORAGE
Information Patent Application
Configuration and method for the low-loss writing of an MRAM
- Publication number 20020021543
- Publication date Feb 21, 2002
- Dietmar Gogl
- G11 - INFORMATION STORAGE
Information Patent Application
Configuration for implementing redundancy for a memory chip
- Publication number 20020012281
- Publication date Jan 31, 2002
- Helmut Fischer
- G11 - INFORMATION STORAGE
Information Patent Application
MRAM configuration
- Publication number 20020003720
- Publication date Jan 10, 2002
- Thomas Bohm
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated semiconductor memory having memory cells with a ferroele...
- Publication number 20010038561
- Publication date Nov 8, 2001
- Robert Esterl
- G11 - INFORMATION STORAGE
Information Patent Application
Method for operating an integrated memory
- Publication number 20010036100
- Publication date Nov 1, 2001
- Robert Esterl
- G11 - INFORMATION STORAGE

Helmut Kandolf

Person

Patents Grantslast 30 patents

Hub chip for one or more memory modules

Magnetic memory configuration

Integrated memory with memory cell array

Configuration and method for the low-loss writing of an MRAM

Semiconductor memory device having row and column redundancy circui...

Circuit configuration for controlling write and read operations in...

Integrated semiconductor memory having memory cells with a ferroele...

MRAM configuration

Configuration for implementing redundancy for a memory chip

Method for operating an integrated memory

Patents Applicationslast 30 patents

Hub chip for one or more memory modules

Magnetic memory configuration

Digital memory circuit and method of manufacturing the circuit

Integrated memory

Circuit configuration for controlling write and read operations in...

Configuration and method for the low-loss writing of an MRAM

Configuration for implementing redundancy for a memory chip

MRAM configuration

Integrated semiconductor memory having memory cells with a ferroele...

Method for operating an integrated memory