Helmut Tews

Person

Unterhaching, DE, US

People

Patents Grantslast 30 patents

Information Patent Grant
Strained semiconductor device and method of making the same
- Patent number 9,559,204
- Issue date Jan 31, 2017
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for producing a tunnel field-effect transistor
- Patent number 9,390,975
- Issue date Jul 12, 2016
- Infineon Technologies AG
- Ronald Kakoschke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained semiconductor device and method of making the same
- Patent number 8,946,034
- Issue date Feb 3, 2015
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of implanting using a shadow effect
- Patent number 7,767,562
- Issue date Aug 3, 2010
- Qimonda AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nitrogen implantation using a shadow effect to control gate oxide t...
- Patent number 6,967,147
- Issue date Nov 22, 2005
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabrication of a semiconductor component having a tungs...
- Patent number 6,960,541
- Issue date Nov 1, 2005
- Infineon Technologies AG
- Dirk Drescher
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structures and manufacturing methods
- Patent number 6,740,555
- Issue date May 25, 2004
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High aspect ratio PBL SiN barrier formation
- Patent number 6,677,197
- Issue date Jan 13, 2004
- Infineon Technologies AG
- Stephan Kudelka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process flow for two-step collar in DRAM preparation
- Patent number 6,670,235
- Issue date Dec 30, 2003
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for surface roughness enhancement in semiconductor capacitor...
- Patent number 6,613,642
- Issue date Sep 2, 2003
- International Business Machines Corporation
- Stephen Rahn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structures and manufacturing methods
- Patent number 6,605,860
- Issue date Aug 12, 2003
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of preparing buried LOCOS collar in trench DRAMS
- Patent number 6,599,798
- Issue date Jul 29, 2003
- Infineon Technologies AG
- Helmut Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single sided buried strap
- Patent number 6,573,137
- Issue date Jun 3, 2003
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Rough oxide hard mask for DT surface area enhancement for DT DRAM
- Patent number 6,559,002
- Issue date May 6, 2003
- Infineon Technologies North America Corp.
- Stephan Kudelka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process flow for capacitance enhancement in a DRAM trench
- Patent number 6,555,430
- Issue date Apr 29, 2003
- International Business Machines Corporation
- Michael P. Chudzik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for improving the thickness uniformity of a thin oxide laye...
- Patent number 6,537,926
- Issue date Mar 25, 2003
- Infineon Technologies, AG
- Martin Schrems
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Negative ion implant mask formation for self-aligned, sublithograph...
- Patent number 6,498,061
- Issue date Dec 24, 2002
- International Business Machines Corporation
- Rama Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit trench device with a dielectric collar stack, an...
- Patent number 6,486,024
- Issue date Nov 26, 2002
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plasma doping for DRAM with deep trenches and hemispherical grains
- Patent number 6,475,859
- Issue date Nov 5, 2002
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming low-leakage on-chip capacitor
- Patent number 6,451,662
- Issue date Sep 17, 2002
- International Business Machines Corporation
- Michael Chudzik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for improved isolation in trench storage cells
- Patent number 6,437,401
- Issue date Aug 20, 2002
- Infineon Technologies AG
- Jack A. Mandelman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Combined preanneal/oxidation step using rapid thermal processing
- Patent number 6,436,846
- Issue date Aug 20, 2002
- Siemens Aktiengesellscharft
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device with reduced orientation-dependent oxid...
- Patent number 6,437,381
- Issue date Aug 20, 2002
- International Business Machines Corporation
- Ulrike Gruening
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a vertically oriented device in an integrated cir...
- Patent number 6,426,253
- Issue date Jul 30, 2002
- Infineon Technologies A G
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Light source for generating a visible light
- Patent number 6,396,081
- Issue date May 28, 2002
- Osram Opto Semiconductor GmbH & Co. OHG
- Helmut Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Control of oxide thickness in vertical transistor structures
- Patent number 6,372,567
- Issue date Apr 16, 2002
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduction of orientation dependent oxidation for vertical sidewalls...
- Patent number 6,362,040
- Issue date Mar 26, 2002
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Orientation independent oxidation of silicon
- Patent number 6,358,867
- Issue date Mar 19, 2002
- Infineon Technologies AG
- Helmut Horst Tews
- C30 - CRYSTAL GROWTH
Information Patent Grant
Process for fabricating a uniform gate oxide of a vertical transistor
- Patent number 6,348,388
- Issue date Feb 19, 2002
- International Business Machines Corporation
- Johnathan E. Faltermeier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit vertical trench device and method of forming the...
- Patent number 6,335,247
- Issue date Jan 1, 2002
- Infineon Technologies AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Methods for Producing a Tunnel Field-Effect Transistor
- Publication number 20150140770
- Publication date May 21, 2015
- INFINEON TECHNOLOGIES AG
- Ronald Kakoschke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Strained Semiconductor Device and Method of Making the Same
- Publication number 20150123201
- Publication date May 7, 2015
- INFINEON TECHNOLOGIES AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Strained Semiconductor Device and Method of Making the Same
- Publication number 20140077299
- Publication date Mar 20, 2014
- INFINEON TECHNOLOGIES AG
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of implanting using a shadow effect
- Publication number 20060024930
- Publication date Feb 2, 2006
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structures and manufacturing methods
- Publication number 20040209474
- Publication date Oct 21, 2004
- Helmut Horst Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of preparing buried LOCOS collar in trench DRAMS
- Publication number 20040115895
- Publication date Jun 17, 2004
- Helmut Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High aspect ratio PBL SiN barrier formation
- Publication number 20030124805
- Publication date Jul 3, 2003
- Infineon Technologies North America Corp.
- Stephan Kudelka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR SURFACE ROUGHNESS ENHANCEMENT IN SEMICONDUCTOR CAPACITOR...
- Publication number 20030114005
- Publication date Jun 19, 2003
- International Business Machines Corporation
- Stephen Rahn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Gate processing method with reduced gate oxide corner and edge thin...
- Publication number 20030067035
- Publication date Apr 10, 2003
- Helmut Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of preparing buried LOCOS collar in trench DRAMS
- Publication number 20030020112
- Publication date Jan 30, 2003
- Helmut Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PREPARING BURIED LOCOS COLLAR IN TRENCH DRAMS
- Publication number 20030020110
- Publication date Jan 30, 2003
- Helmut Tews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for surface area enhancement of capacitors by film growth an...
- Publication number 20020106857
- Publication date Aug 8, 2002
- International Business Machines Corporation
- Rajarao Jammy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor component and process for its fabrication
- Publication number 20020070414
- Publication date Jun 13, 2002
- Dirk Drescher
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Negative Ion implant mask formation for self-aligned, sublithograph...
- Publication number 20020068399
- Publication date Jun 6, 2002
- Rama Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS

Helmut Tews

Person

Patents Grantslast 30 patents

Strained semiconductor device and method of making the same

Methods for producing a tunnel field-effect transistor

Strained semiconductor device and method of making the same

Method of implanting using a shadow effect

Nitrogen implantation using a shadow effect to control gate oxide t...

Process for fabrication of a semiconductor component having a tungs...

Semiconductor structures and manufacturing methods

High aspect ratio PBL SiN barrier formation

Process flow for two-step collar in DRAM preparation

Method for surface roughness enhancement in semiconductor capacitor...

Semiconductor structures and manufacturing methods

Method of preparing buried LOCOS collar in trench DRAMS

Single sided buried strap

Rough oxide hard mask for DT surface area enhancement for DT DRAM

Process flow for capacitance enhancement in a DRAM trench

Process for improving the thickness uniformity of a thin oxide laye...

Negative ion implant mask formation for self-aligned, sublithograph...

Integrated circuit trench device with a dielectric collar stack, an...

Plasma doping for DRAM with deep trenches and hemispherical grains

Method of forming low-leakage on-chip capacitor

Structure and method for improved isolation in trench storage cells

Combined preanneal/oxidation step using rapid thermal processing

Semiconductor memory device with reduced orientation-dependent oxid...

Method of forming a vertically oriented device in an integrated cir...

Light source for generating a visible light

Control of oxide thickness in vertical transistor structures

Reduction of orientation dependent oxidation for vertical sidewalls...

Orientation independent oxidation of silicon

Process for fabricating a uniform gate oxide of a vertical transistor

Integrated circuit vertical trench device and method of forming the...

Patents Applicationslast 30 patents

Methods for Producing a Tunnel Field-Effect Transistor

Strained Semiconductor Device and Method of Making the Same

Strained Semiconductor Device and Method of Making the Same

Method of implanting using a shadow effect

Semiconductor structures and manufacturing methods

Method of preparing buried LOCOS collar in trench DRAMS

High aspect ratio PBL SiN barrier formation

METHOD FOR SURFACE ROUGHNESS ENHANCEMENT IN SEMICONDUCTOR CAPACITOR...

Gate processing method with reduced gate oxide corner and edge thin...

Method of preparing buried LOCOS collar in trench DRAMS

METHOD OF PREPARING BURIED LOCOS COLLAR IN TRENCH DRAMS

Method for surface area enhancement of capacitors by film growth an...

Semiconductor component and process for its fabrication

Negative Ion implant mask formation for self-aligned, sublithograph...