Hemanshu T. Vernenker

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Design features for testing integrated circuits
- Patent number 7,685,483
- Issue date Mar 23, 2010
- Lattice Semiconductor Corporation
- Allen White
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Information Patent Grant
Variable data width memory systems and methods
- Patent number 7,539,076
- Issue date May 26, 2009
- Lattice Semiconductor Corporation
- Hemanshu Vernenker
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitline twisting scheme for multiport memory
- Patent number 7,414,913
- Issue date Aug 19, 2008
- Lattice Semiconductor Corporation
- Larry Fenstermaker
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoding systems and methods
- Patent number 7,378,879
- Issue date May 27, 2008
- Lattice Semiconductor Corporation
- Louis De La Cruz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Testing embedded memory in integrated circuits such as programmable...
- Patent number 7,376,872
- Issue date May 20, 2008
- Lattice Semiconductor Corporation
- Michael Nelson
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Information Patent Grant
Address decoding systems and methods
- Patent number 7,342,846
- Issue date Mar 11, 2008
- Lattice Semiconductor Corporation
- Louis De La Cruz
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulse-generation circuit with multi-delay block and set-reset latches
- Patent number 7,317,343
- Issue date Jan 8, 2008
- Lattice Semiconductor Corporation
- Louis De La Cruz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Variable data width memory systems and methods
- Patent number 7,307,912
- Issue date Dec 11, 2007
- Lattice Semiconductor Corporation
- Hemanshu T. Vernenker
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Information Patent Grant
Multi-port memory systems and methods for bit line coupling
- Patent number 7,221,607
- Issue date May 22, 2007
- Lattice Semiconductor Corporation
- Hemanshu T. Vernenker
- G11 - INFORMATION STORAGE
Information Patent Grant
Byte enable logic for memory
- Patent number 7,215,591
- Issue date May 8, 2007
- Lattice Semiconductor Corporation
- Hemanshu T. Vernenker
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Information Patent Grant
Cascadable memory
- Patent number 7,187,203
- Issue date Mar 6, 2007
- Lattice Semiconductor Corporation
- Christopher Hume
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Initializing memory blocks
- Patent number 7,177,221
- Issue date Feb 13, 2007
- Lattice Semiconductor Corporation
- Zheng Chen
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Information Patent Grant
Sense amplifier timing
- Patent number 7,177,207
- Issue date Feb 13, 2007
- Lattice Semiconductor Corporation
- Hemanshu T. Vernenker
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Information Patent Grant
Memory output data systems and methods with feedback
- Patent number 7,149,129
- Issue date Dec 12, 2006
- Lattice Semiconductor Corporation
- Hemanshu T. Vernenker
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory systems and methods
- Patent number 7,116,585
- Issue date Oct 3, 2006
- Lattice Semiconductor Corporation
- Hemanshu T. Vernenker
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Information Patent Grant
Multiport memory with twisted bitlines
- Patent number 6,909,663
- Issue date Jun 21, 2005
- Lattice Semiconductor Corporation
- Hemanshu T. Vernenker
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Information Patent Grant
Method and apparatus for generating an echo clock in a memory
- Patent number 6,240,024
- Issue date May 29, 2001
- Motorola, Inc.
- Mohammed H. Taufique
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Patents Applicationslast 30 patents

Information Patent Application
Address decoding systems and methods
- Publication number 20070019495
- Publication date Jan 25, 2007
- Louis De La Cruz
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Information Patent Application
Memory output data systems and methods with feedback
- Publication number 20060087897
- Publication date Apr 27, 2006
- Lattice Semiconductor Corporation
- Hemanshu T. Vernenker
- G11 - INFORMATION STORAGE
Information Patent Application
Byte enable logic for memory
- Publication number 20060028897
- Publication date Feb 9, 2006
- Hemanshu T. Vernenker
- G11 - INFORMATION STORAGE
Information Patent Application
Memory systems and methods
- Publication number 20060007754
- Publication date Jan 12, 2006
- Hemanshu T. Vernenker
- G11 - INFORMATION STORAGE

Hemanshu T. Vernenker

Person

Patents Grantslast 30 patents

Design features for testing integrated circuits

Variable data width memory systems and methods

Bitline twisting scheme for multiport memory

Decoding systems and methods

Testing embedded memory in integrated circuits such as programmable...

Address decoding systems and methods

Pulse-generation circuit with multi-delay block and set-reset latches

Variable data width memory systems and methods

Multi-port memory systems and methods for bit line coupling

Byte enable logic for memory

Cascadable memory

Initializing memory blocks

Sense amplifier timing

Memory output data systems and methods with feedback

Memory systems and methods

Multiport memory with twisted bitlines

Method and apparatus for generating an echo clock in a memory

Patents Applicationslast 30 patents

Address decoding systems and methods

Memory output data systems and methods with feedback

Byte enable logic for memory

Memory systems and methods