Hemant Kashyap

Follow

Person

HYDERABAD, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit design simulation and clock event reduction
- Patent number 12,086,521
- Issue date Sep 10, 2024
- Xilinx, Inc.
- Tharun Kumar Ksheerasagar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compiler-based generation of transaction accurate models from high-...
- Patent number 12,032,932
- Issue date Jul 9, 2024
- Xilinx, Inc.
- Shantanu Mishra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data traffic injection for simulation of circuit designs
- Patent number 11,630,935
- Issue date Apr 18, 2023
- Xilinx, Inc.
- Amit Kasat
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-THREADED CYCLE-ACCURATE ARCHITECTURE SIMULATION
- Publication number 20240184616
- Publication date Jun 6, 2024
- Xilinx, Inc.
- Tharun Kumar Ksheerasagar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPILER-BASED GENERATION OF TRANSACTION ACCURATE MODELS FROM HIGH-...
- Publication number 20240012629
- Publication date Jan 11, 2024
- Xilinx, Inc.
- Shantanu Mishra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA TRAFFIC INJECTION FOR SIMULATION OF CIRCUIT DESIGNS
- Publication number 20230113197
- Publication date Apr 13, 2023
- Xilinx, Inc.
- Amit Kasat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT DESIGN SIMULATION AND CLOCK EVENT REDUCTION
- Publication number 20230114858
- Publication date Apr 13, 2023
- Xilinx, Inc.
- Tharun Kumar Ksheerasagar
- G06 - COMPUTING CALCULATING COUNTING