Henry Potts

Person

Ft. Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Streaming, at-speed debug and validation architecture
- Patent number 9,703,916
- Issue date Jul 11, 2017
- Mentor Graphics Corporation
- Rajeev Sehgal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metastability glitch detection
- Patent number 9,673,819
- Issue date Jun 6, 2017
- Mentor Graphics Corporation
- Rajeev Sehgal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Trace routing according to freeform sketches
- Patent number 9,256,707
- Issue date Feb 9, 2016
- Henry Potts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic printed circuit board design reuse
- Patent number 9,015,647
- Issue date Apr 21, 2015
- Mentor Graphics Corporation
- Gerald Suiter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trace routing according to freeform sketches
- Patent number 8,930,868
- Issue date Jan 6, 2015
- Mentor Graphics Corporation
- Henry Potts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Use of breakouts in printed circuit board designs
- Patent number 8,103,988
- Issue date Jan 24, 2012
- Mentor Graphics Corporation
- Charles L. Pfeil
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Parallel electronic design automation: shared simultaneous editing
- Patent number 7,949,990
- Issue date May 24, 2011
- Mentor Graphics Corporation
- Charles Pfeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed electronic design automation environment
- Patent number 7,546,571
- Issue date Jun 9, 2009
- Mentor Graphics Corporation
- Richard Mankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reservation of design elements in a parallel printed circuit board...
- Patent number 7,516,435
- Issue date Apr 7, 2009
- Mentor Graphics Corporation
- Vladimir V. Petunin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel electronic design automation: shared simultaneous editing
- Patent number 6,708,313
- Issue date Mar 16, 2004
- Charles Pfeil
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METASTABILITY GLITCH DETECTION
- Publication number 20170141764
- Publication date May 18, 2017
- Mentor Graphics Corporation
- Rajeev Sehgal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CIRCUIT DESIGN LAYOUT IN MULTIPLE SYNCHRONOUS REPRESENTATIONS
- Publication number 20160171143
- Publication date Jun 16, 2016
- Mentor Graphics Corporation
- Gerald Suiter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING, AT-SPEED DEBUG AND VALIDATION ARCHITECTURE
- Publication number 20150220677
- Publication date Aug 6, 2015
- Mentor Graphics Corporation
- Rajeev Sehgal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METASTABILITY GLITCH DETECTION
- Publication number 20150214933
- Publication date Jul 30, 2015
- Mentor Graphics Corporation
- Rajeev Sehgal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TRACE ROUTING ACCORDING TO FREEFORM SKETCHES
- Publication number 20150193572
- Publication date Jul 9, 2015
- Mentor Graphics Corporation
- Henry Potts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PRINTED CIRCUIT BOARD DESIGN REUSE
- Publication number 20140123098
- Publication date May 1, 2014
- Mentor Graphics Corporation
- Gerald Suiter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Printed Circuit Board Design Reuse
- Publication number 20110035720
- Publication date Feb 10, 2011
- Gerald Suiter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Trace Routing According To Freeform Sketches
- Publication number 20110010683
- Publication date Jan 13, 2011
- Henry Potts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Heuristic Routing For Electronic Device Layout Designs
- Publication number 20100199251
- Publication date Aug 5, 2010
- Henry Potts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel Electronic Design Automation: Shared Simultaneous Editing
- Publication number 20100199240
- Publication date Aug 5, 2010
- Mentor Graphics Corporation
- Charles Pfeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Use of breakouts in printed circuit board designs
- Publication number 20080178139
- Publication date Jul 24, 2008
- Charles L. Pfeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel Electronic Design Automation: Shared Simultaneous Editing
- Publication number 20080059932
- Publication date Mar 6, 2008
- Mentor Graphics Corporation
- Charles Pfeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Distributed electronic design automation environment
- Publication number 20060101368
- Publication date May 11, 2006
- Mentor Graphics Corporation
- Ravi Kesarwani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Distributed electronic design automation environment
- Publication number 20060095882
- Publication date May 4, 2006
- Mentor Graphics Corporation
- Richard Mankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reservation of design elements in a parallel printed circuit board...
- Publication number 20050044518
- Publication date Feb 24, 2005
- Mentor Graphics Corporation
- Vladimir V. Petunin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parellel electronic design automation: shared simultaneous editing
- Publication number 20040210854
- Publication date Oct 21, 2004
- Mentor Graphics Corporation
- Charles Pfeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel electronic design automation: Shared simultaneous editing
- Publication number 20030131332
- Publication date Jul 10, 2003
- Charles Pfeil
- G06 - COMPUTING CALCULATING COUNTING

Henry Potts

Person

Patents Grantslast 30 patents

Streaming, at-speed debug and validation architecture

Metastability glitch detection

Trace routing according to freeform sketches

Dynamic printed circuit board design reuse

Trace routing according to freeform sketches

Use of breakouts in printed circuit board designs

Parallel electronic design automation: shared simultaneous editing

Distributed electronic design automation environment

Reservation of design elements in a parallel printed circuit board...

Parallel electronic design automation: shared simultaneous editing

Patents Applicationslast 30 patents

METASTABILITY GLITCH DETECTION

CIRCUIT DESIGN LAYOUT IN MULTIPLE SYNCHRONOUS REPRESENTATIONS

STREAMING, AT-SPEED DEBUG AND VALIDATION ARCHITECTURE

METASTABILITY GLITCH DETECTION

TRACE ROUTING ACCORDING TO FREEFORM SKETCHES

DYNAMIC PRINTED CIRCUIT BOARD DESIGN REUSE

Dynamic Printed Circuit Board Design Reuse

Trace Routing According To Freeform Sketches

Heuristic Routing For Electronic Device Layout Designs

Parallel Electronic Design Automation: Shared Simultaneous Editing

Use of breakouts in printed circuit board designs

Parallel Electronic Design Automation: Shared Simultaneous Editing

Distributed electronic design automation environment

Distributed electronic design automation environment

Reservation of design elements in a parallel printed circuit board...

Parellel electronic design automation: shared simultaneous editing

Parallel electronic design automation: Shared simultaneous editing