Henry Wong

Person

Nepean, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Serdes with jitter injection self stress mechanism
- Patent number 10,693,589
- Issue date Jun 23, 2020
- Huawei Technologies Co., Ltd.
- Ehud Nir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
FFE-aided CDR to calibrate phase offset and enhance gain in baud ra...
- Patent number 10,284,397
- Issue date May 7, 2019
- Huawei Technologies Co., Ltd.
- Yuchun Lu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamic control of ADC resolution
- Patent number 10,009,035
- Issue date Jun 26, 2018
- Huawei Technologies Co., Ltd.
- Marc-Andre LaCroix
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
FFE-aided CDR to calibrate phase offset and enhance gain in baud ra...
- Patent number 10,003,481
- Issue date Jun 19, 2018
- Huawei Technologies Co., Ltd.
- Yuchun Lu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
FFE-aided CDR to calibrate phase offset and enhance gain in baud ra...
- Patent number 9,712,349
- Issue date Jul 18, 2017
- Huawei Technologies Co., Ltd.
- Yuchun Lu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Skew detection and correction in time-interleaved analog-to-digital...
- Patent number 9,553,600
- Issue date Jan 24, 2017
- Huawei Technologies Co., Ltd.
- Marc-Andre Lacroix
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for detecting loss of signal
- Patent number 9,515,785
- Issue date Dec 6, 2016
- Huawei Technologies Co., Ltd.
- Davide Tonietto
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low latency digital jitter termination for repeater circuits
- Patent number 9,444,615
- Issue date Sep 13, 2016
- Semtech Canada Corporation
- Andrew Marshall
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SERDES WITH JITTER INJECTION SELF STRESS MECHANISM
- Publication number 20190386773
- Publication date Dec 19, 2019
- Ehud Nir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FEC DRIVEN LINK OPTIMIZATION
- Publication number 20190028236
- Publication date Jan 24, 2019
- DAVIDE TONIETTO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FFE-Aided CDR to Calibrate Phase Offset and Enhance Gain In Baud Ra...
- Publication number 20180278444
- Publication date Sep 27, 2018
- Huawei Technologies Co., Ltd
- Yuchun Lu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FFE-Aided CDR to Calibrate Phase Offset and Enhance Gain In Baud Ra...
- Publication number 20170317857
- Publication date Nov 2, 2017
- Huawei Technologies Co., Ltd
- Yuchun Lu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR DETECTING LOSS OF SIGNAL
- Publication number 20160173240
- Publication date Jun 16, 2016
- Davide Tonietto
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW LATENCY DIGITAL JITTER TERMINATION FOR REPEATER CIRCUITS
- Publication number 20150146834
- Publication date May 28, 2015
- SEMTECH Canada Corporation
- Andrew Marshall
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Serdes with jitter injection self stress mechanism

FFE-aided CDR to calibrate phase offset and enhance gain in baud ra...

Dynamic control of ADC resolution

FFE-aided CDR to calibrate phase offset and enhance gain in baud ra...

FFE-aided CDR to calibrate phase offset and enhance gain in baud ra...

Skew detection and correction in time-interleaved analog-to-digital...

System and method for detecting loss of signal

Low latency digital jitter termination for repeater circuits

Patents Applicationslast 30 patents

SERDES WITH JITTER INJECTION SELF STRESS MECHANISM

FEC DRIVEN LINK OPTIMIZATION

FFE-Aided CDR to Calibrate Phase Offset and Enhance Gain In Baud Ra...

FFE-Aided CDR to Calibrate Phase Offset and Enhance Gain In Baud Ra...

SYSTEM AND METHOD FOR DETECTING LOSS OF SIGNAL

LOW LATENCY DIGITAL JITTER TERMINATION FOR REPEATER CIRCUITS