Heon C. Kim

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Verification of SoC scan dump and memory dump operations
- Patent number 8,788,886
- Issue date Jul 22, 2014
- Apple Inc.
- Andrew K. Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuitry to prevent peak power problems during scan shift
- Patent number 7,831,877
- Issue date Nov 9, 2010
- Silicon Image, Inc.
- Chinsong Sul
- G01 - MEASURING TESTING
Information Patent Grant
Interface test circuitry and methods
- Patent number 7,698,088
- Issue date Apr 13, 2010
- Silicon Image, Inc.
- Chinsong Sul
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Built-in self test circuit employing a linear feedback shift register
- Patent number 6,769,084
- Issue date Jul 27, 2004
- Samsung Electronics Co., Ltd.
- Heon Cheol Kim
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
VERIFICATION OF SOC SCAN DUMP AND MEMORY DUMP OPERATIONS
- Publication number 20130055023
- Publication date Feb 28, 2013
- Andrew K. Chong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUITRY TO PREVENT PEAK POWER PROBLEMS DURING SCAN SHIFT
- Publication number 20080222471
- Publication date Sep 11, 2008
- Chinsong Sul
- G01 - MEASURING TESTING
Information Patent Application
INTERFACE TEST CIRCUITRY AND METHODS
- Publication number 20080114562
- Publication date May 15, 2008
- Chinsong Sul
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Programmable in-situ delay fault test clock generator
- Publication number 20060242474
- Publication date Oct 26, 2006
- Cisco Technology, Inc.
- Hong-Shin Jun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Built-in self test circuit employing a linear feedback shift register
- Publication number 20020138800
- Publication date Sep 26, 2002
- SAMSUNG ELECTRONICS CO., LTD.
- Heon Cheol Kim
- G11 - INFORMATION STORAGE