Hideaki Konishi

Person

Yokohama, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor integrated circuit and method for testing the same
- Patent number 7,872,490
- Issue date Jan 18, 2011
- Fujitsu Semiconductor Limited
- Masayasu Fukunaga
- G01 - MEASURING TESTING
Information Patent Grant
Delay failure test circuit
- Patent number 7,640,124
- Issue date Dec 29, 2009
- Fujitsu Microelectronics Limited
- Hideaki Konishi
- G01 - MEASURING TESTING
Information Patent Grant
Test pattern generator, test circuit tester, test pattern generatin...
- Patent number 7,516,376
- Issue date Apr 7, 2009
- Fujitsu Microelectronics Limited
- Osamu Okano
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for supporting designing of LSI, and computer...
- Patent number 7,315,997
- Issue date Jan 1, 2008
- Fujitsu Limited
- Hitoshi Watanabe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing apparatus and testing method for an integrated circuit, and...
- Patent number 7,178,078
- Issue date Feb 13, 2007
- Fujitsu Limited
- Takahisa Hiraide
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor integrated circuit and method for testing the same
- Publication number 20100213970
- Publication date Aug 26, 2010
- FUJITSU MICROELECTRONICS LIMITED
- Masayasu Fukunaga
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay failure test circuit
- Publication number 20070288184
- Publication date Dec 13, 2007
- FUJITSU LIMITED
- Hideaki Konishi
- G01 - MEASURING TESTING
Information Patent Application
Testing apparatus and testing method for an integrated circuit, and...
- Publication number 20070168816
- Publication date Jul 19, 2007
- FUJITSU LIMITED
- Takahisa Hiraide
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for supporting test pattern generation, and co...
- Publication number 20060206772
- Publication date Sep 14, 2006
- FUJITSU LIMITED
- Naoko Karasawa
- G01 - MEASURING TESTING
Information Patent Application
Test pattern generator, test circuit tester, test pattern generatin...
- Publication number 20050289419
- Publication date Dec 29, 2005
- FUJITSU LIMITED
- Osamu Okano
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for supporting designing of LSI, and computer...
- Publication number 20050172254
- Publication date Aug 4, 2005
- FUJITSU LIMITED
- Hitoshi Watanabe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Testing apparatus and testing method for an integrated circuit, and...
- Publication number 20020124217
- Publication date Sep 5, 2002
- FUJITSU LIMITED
- Takahisa Hiraide
- G01 - MEASURING TESTING

Hideaki Konishi

Person

Patents Grantslast 30 patents

Semiconductor integrated circuit and method for testing the same

Delay failure test circuit

Test pattern generator, test circuit tester, test pattern generatin...

Method and apparatus for supporting designing of LSI, and computer...

Testing apparatus and testing method for an integrated circuit, and...

Patents Applicationslast 30 patents

Semiconductor integrated circuit and method for testing the same

Delay failure test circuit

Testing apparatus and testing method for an integrated circuit, and...

Method and apparatus for supporting test pattern generation, and co...

Test pattern generator, test circuit tester, test pattern generatin...

Method and apparatus for supporting designing of LSI, and computer...

Testing apparatus and testing method for an integrated circuit, and...