Hideki Ishida

Person

Kawasaki, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Adaptive equalizer circuit
- Patent number 8,270,462
- Issue date Sep 18, 2012
- Fujitsu Limited
- Hisakatsu Yamaguchi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Semiconductor integrated circuit device enabling to produce a stabl...
- Patent number 7,659,766
- Issue date Feb 9, 2010
- Fujitsu Limited
- Hideki Ishida
- G05 - CONTROLLING REGULATING
Information Patent Grant
Oscillator and semiconductor device
- Patent number 7,336,135
- Issue date Feb 26, 2008
- Fujitsu Limited
- Hirohito Higashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Differential amplifier circuit capable of accurately amplifying eve...
- Patent number 7,233,172
- Issue date Jun 19, 2007
- Fujitsu Limited
- Yoshie Kanamori
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock recovery circuit for high-speed data signal transmission
- Patent number 7,203,860
- Issue date Apr 10, 2007
- Fujitsu Limited
- Hideki Ishida
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock recovery circuit and receiver circuit for improving the error...
- Patent number 7,116,744
- Issue date Oct 3, 2006
- Fujitsu Limited
- Takuya Saze
- G11 - INFORMATION STORAGE
Information Patent Grant
Frequency measurement circuit
- Patent number 6,917,191
- Issue date Jul 12, 2005
- Fujitsu Limited
- Kazuaki Oishi
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor integrated circuit device enabling to produce a stabl...
- Patent number 6,844,773
- Issue date Jan 18, 2005
- Fujitsu Limited
- Hideki Ishida
- G05 - CONTROLLING REGULATING
Information Patent Grant
Frequency measurement circuit
- Patent number 6,674,277
- Issue date Jan 6, 2004
- Fujitsu Limited
- Kazuaki Oishi
- G01 - MEASURING TESTING
Information Patent Grant
Automatic bias adjustment circuit for use in PLL circuit
- Patent number 6,624,706
- Issue date Sep 23, 2003
- Fujitsu Limited
- Hirohito Higashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Current source switch circuit
- Patent number 6,194,955
- Issue date Feb 27, 2001
- Fujitsu Limited
- Hideki Ishida
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ADAPTIVE EQUALIZER CIRCUIT
- Publication number 20090310666
- Publication date Dec 17, 2009
- FUJITSU LIMITED
- Hisakatsu YAMAGUCHI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LEVEL SHIFT CIRCUIT
- Publication number 20080204110
- Publication date Aug 28, 2008
- FUJITSU LIMITED
- Hideki Ishida
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Oscillator and semiconductor device
- Publication number 20050265053
- Publication date Dec 1, 2005
- FUJITSU LIMITED
- Hirohito Higashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor integrated circuit device enabling to produce a stabl...
- Publication number 20050083031
- Publication date Apr 21, 2005
- FUJITSU LIMITED
- Hideki Ishida
- G05 - CONTROLLING REGULATING
Information Patent Application
Frequency measurement circuit
- Publication number 20040100245
- Publication date May 27, 2004
- FUJITSU LIMITED
- Kazuaki Oishi
- G01 - MEASURING TESTING
Information Patent Application
Semiconductor integrated circuit device enabling to produce a stabl...
- Publication number 20040017248
- Publication date Jan 29, 2004
- FUJITSU LIMITED
- Hideki Ishida
- G05 - CONTROLLING REGULATING
Information Patent Application
Clock recovery circuit for high-speed data signal transmission
- Publication number 20030204767
- Publication date Oct 30, 2003
- FUJITSU LIMITED
- Hideki Ishida
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Clock recovery circuit and receiver circuit for improving the error...
- Publication number 20020172304
- Publication date Nov 21, 2002
- FUJITSU LIMITED
- Takuya Saze
- G11 - INFORMATION STORAGE
Information Patent Application
Differential amplifier circuit capable of accurately amplifying eve...
- Publication number 20020171453
- Publication date Nov 21, 2002
- FUJITSU LIMITED
- Yoshie Kanamori
- G11 - INFORMATION STORAGE
Information Patent Application
Automatic bias adjustment circuit for use in PLL circuit
- Publication number 20020079973
- Publication date Jun 27, 2002
- FUJITSU LIMITED
- Hirohito Higashi
- H03 - BASIC ELECTRONIC CIRCUITRY

Hideki Ishida

Person

Patents Grantslast 30 patents

Adaptive equalizer circuit

Semiconductor integrated circuit device enabling to produce a stabl...

Oscillator and semiconductor device

Differential amplifier circuit capable of accurately amplifying eve...

Clock recovery circuit for high-speed data signal transmission

Clock recovery circuit and receiver circuit for improving the error...

Frequency measurement circuit

Semiconductor integrated circuit device enabling to produce a stabl...

Frequency measurement circuit

Automatic bias adjustment circuit for use in PLL circuit

Current source switch circuit

Patents Applicationslast 30 patents

ADAPTIVE EQUALIZER CIRCUIT

LEVEL SHIFT CIRCUIT

Oscillator and semiconductor device

Semiconductor integrated circuit device enabling to produce a stabl...

Frequency measurement circuit

Semiconductor integrated circuit device enabling to produce a stabl...

Clock recovery circuit for high-speed data signal transmission

Clock recovery circuit and receiver circuit for improving the error...

Differential amplifier circuit capable of accurately amplifying eve...

Automatic bias adjustment circuit for use in PLL circuit