Hidetaka Ebeshu

Person

Kawasaki, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Gateway apparatus and data transfer control method
- Patent number 8,265,087
- Issue date Sep 11, 2012
- Fujitsu Ten Limited
- Kaoru Noumi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Error detector and error detection method
- Patent number 8,122,316
- Issue date Feb 21, 2012
- Fujitsu Ten Limited
- Kaoru Noumi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Gateway apparatus and data managing method
- Patent number 8,027,352
- Issue date Sep 27, 2011
- Fujitsu Semiconductor Limited
- Kaoru Noumi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data transferring device for transferring data sent from one commun...
- Patent number 7,707,333
- Issue date Apr 27, 2010
- Fujitsu Microelectronics Limited
- Hidetaka Ebeshu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache system with limited number of tag memory accesses
- Patent number 6,775,741
- Issue date Aug 10, 2004
- Fujitsu Limited
- Hidetaka Ebeshu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor apparatus and read access method
- Patent number 6,167,493
- Issue date Dec 26, 2000
- Fujitsu Limited
- Hidetaka Ebeshu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with reduced power consumption in accordance with us...
- Patent number 6,035,410
- Issue date Mar 7, 2000
- Fujitsu Limited
- Hidetaka Ebeshu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DATA TRANSFER DEVICE
- Publication number 20090222597
- Publication date Sep 3, 2009
- Fujitsu Limited
- Yasuyuki UMEZAKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error detector and error detection method
- Publication number 20080141074
- Publication date Jun 12, 2008
- FUJITSU TEN LIMITED
- Kaoru Noumi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Gateway apparatus and data managing method
- Publication number 20080101393
- Publication date May 1, 2008
- FUJITSU TEN LIMITED
- Kaoru Noumi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Gateway apparatus and data transfer control method
- Publication number 20080101394
- Publication date May 1, 2008
- FUJITSU TEN LIMITED
- Kaoru Noumi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Data transferring device
- Publication number 20060069817
- Publication date Mar 30, 2006
- FUJITSU LIMITED
- Hidetaka Ebeshu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DMA transfer apparatus and method of controlling data transfer
- Publication number 20060031604
- Publication date Feb 9, 2006
- FUJITSU LIMITED
- Norifumi Fukawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Simulation method and apparatus for verifying logic circuit includi...
- Publication number 20030177428
- Publication date Sep 18, 2003
- FUJITSU LIMITED
- Mitsuo Wakabayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache system with limited number of tag memory accesses
- Publication number 20020029321
- Publication date Mar 7, 2002
- Hidetaka Ebeshu
- G06 - COMPUTING CALCULATING COUNTING

Hidetaka Ebeshu

Person

Patents Grantslast 30 patents

Gateway apparatus and data transfer control method

Error detector and error detection method

Gateway apparatus and data managing method

Data transferring device for transferring data sent from one commun...

Cache system with limited number of tag memory accesses

Semiconductor apparatus and read access method

Microprocessor with reduced power consumption in accordance with us...

Patents Applicationslast 30 patents

DATA TRANSFER DEVICE

Error detector and error detection method

Gateway apparatus and data managing method

Gateway apparatus and data transfer control method

Data transferring device

DMA transfer apparatus and method of controlling data transfer

Simulation method and apparatus for verifying logic circuit includi...

Cache system with limited number of tag memory accesses