Hideyuki Terane

Person

Hyogo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Image compression and expansion apparatus using a effectively modif...
- Patent number 6,501,858
- Issue date Dec 31, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Hideyuki Terane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device and method for processing run-length encoded signals by usin...
- Patent number 6,134,349
- Issue date Oct 17, 2000
- Mitsubishi Denki Kabushiki Kaisha
- Hideyuki Terane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Picture encoding device for compressing picture data
- Patent number 6,091,856
- Issue date Jul 18, 2000
- Mitsubishi Electric Semiconductor Software Co., Ltd.
- Hideyuki Terane
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Image conversion device
- Patent number 5,991,446
- Issue date Nov 23, 1999
- Mitsubishi Electric Semiconductor Software Corporation
- Hideyuki Terane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Image coding apparatus for compressing image data
- Patent number 5,905,813
- Issue date May 18, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Hideyuki Terane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microcomputer with improved data processing and data transfer capab...
- Patent number 5,729,706
- Issue date Mar 17, 1998
- Mitsubishi Denki Kabushiki Kaisha
- Hideyuki Terane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct memory access control device and method in a multiprocessor...
- Patent number 5,584,010
- Issue date Dec 10, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Hiroyuki Kawai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for detecting an overflow when shifting N bits...
- Patent number 5,497,340
- Issue date Mar 5, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Shinichi Uramoto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder with carry look ahead circuit
- Patent number 5,357,457
- Issue date Oct 18, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Hideyuki Terane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Amplifier circuit with gain that does not vary with power supply fl...
- Patent number 5,311,142
- Issue date May 10, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Hideyuki Terane
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Processor with preceding operation circuit connected to output of d...
- Patent number 5,204,962
- Issue date Apr 20, 1993
- Mitsubishi Denki Kabushiki Kaisha
- Shinichi Uramoto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing unit containing DMA controller having concurrent operati...
- Patent number 5,136,701
- Issue date Aug 4, 1992
- Mitsubishi Denki Kabushiki Kaisha
- Hiroyuki Kawai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Array processor
- Patent number 5,095,527
- Issue date Mar 10, 1992
- Mitsubishi Denki Kabushiki Kaisha
- Shin-ichi Uramoto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware implemented moving average processor
- Patent number 5,068,818
- Issue date Nov 26, 1991
- Mitbushi Denki Kabushiki Kaisha
- Shinichi Uramoto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SR latch circuit
- Patent number 5,051,610
- Issue date Sep 24, 1991
- Mitsubishi Denki Kabushiki Kaisha
- Hideyuki Terane
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Test circuit for logic circuits
- Patent number 4,961,191
- Issue date Oct 2, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Shin-ichi Nakagawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Priority order decomposing apparatus
- Patent number 4,954,978
- Issue date Sep 4, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Hideyuki Terane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Intergrated logic circuit having testing function circuit formed in...
- Patent number 4,913,557
- Issue date Apr 3, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Hiroshi Segawa
- G01 - MEASURING TESTING
Information Patent Grant
Intergrated circuit having testing function circuit and control cir...
- Patent number 4,910,734
- Issue date Mar 20, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Hiroshi Segawa
- G01 - MEASURING TESTING
Information Patent Grant
Overflow detection circuit
- Patent number 4,899,304
- Issue date Feb 6, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Hideyuki Terane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder capable of usual addition and reverse carry addition
- Patent number 4,897,808
- Issue date Jan 30, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Shin-ichi Nakagawa
- G06 - COMPUTING CALCULATING COUNTING

Hideyuki Terane

Person

Patents Grantslast 30 patents

Image compression and expansion apparatus using a effectively modif...

Device and method for processing run-length encoded signals by usin...

Picture encoding device for compressing picture data

Image conversion device

Image coding apparatus for compressing image data

Microcomputer with improved data processing and data transfer capab...

Direct memory access control device and method in a multiprocessor...

Apparatus and method for detecting an overflow when shifting N bits...

Adder with carry look ahead circuit

Amplifier circuit with gain that does not vary with power supply fl...

Processor with preceding operation circuit connected to output of d...

Processing unit containing DMA controller having concurrent operati...

Array processor

Hardware implemented moving average processor

SR latch circuit

Test circuit for logic circuits

Priority order decomposing apparatus

Intergrated logic circuit having testing function circuit formed in...

Intergrated circuit having testing function circuit and control cir...

Overflow detection circuit

Adder capable of usual addition and reverse carry addition