Hieu Vinh Tran

Person

Charlotte, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory cell array with row direction gap between erase gate lines a...
- Patent number 12,131,786
- Issue date Oct 29, 2024
- Silicon Storage Technology, Inc.
- Louisa Schneider
- G11 - INFORMATION STORAGE
Information Patent Grant
Precise data tuning method and apparatus for analog neural memory i...
- Patent number 12,124,944
- Issue date Oct 22, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Output circuitry for non-volatile memory array in neural network
- Patent number 12,112,798
- Issue date Oct 8, 2024
- Silicon Storage Technology, Inc.
- Farnood Merrikh Bayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoders for analog neural memory in deep learning artificial neura...
- Patent number 12,099,921
- Issue date Sep 24, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input and digital output mechanisms for analog neural memory in a d...
- Patent number 12,075,618
- Issue date Aug 27, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transceiver for providing high voltages for erase or program operat...
- Patent number 12,062,397
- Issue date Aug 13, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Output circuits for an analog neural memory system for deep learnin...
- Patent number 12,061,976
- Issue date Aug 13, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Summing circuit for neural network
- Patent number 12,057,160
- Issue date Aug 6, 2024
- Silicon Storage Technology, Inc.
- Farnood Merrikh Bayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network array comprising one or more coarse cells and one or...
- Patent number 12,057,170
- Issue date Aug 6, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuitry to compensate for data drift in analog neural memory in a...
- Patent number 12,056,601
- Issue date Aug 6, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verifying or reading a cell in an analog neural memory in a deep le...
- Patent number 12,046,290
- Issue date Jul 23, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network classifier using array of three-gate non-volatile me...
- Patent number 12,033,692
- Issue date Jul 9, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid memory system configurable to store neural memory weight dat...
- Patent number 11,989,440
- Issue date May 21, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verification of a weight stored in a non-volatile memory cell in a...
- Patent number 11,972,795
- Issue date Apr 30, 2024
- Silicon Storage Technology, Inc.
- Farnood Merrikh Bayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Word line and control gate line tandem decoder for analog neural me...
- Patent number 11,935,594
- Issue date Mar 19, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Precision tuning of a page or word of non-volatile memory cells in...
- Patent number 11,915,747
- Issue date Feb 27, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural memory array storing synapsis weights in differential cell p...
- Patent number 11,908,513
- Issue date Feb 20, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Female hardened optical connectors for use with male plug connectors
- Patent number 11,892,686
- Issue date Feb 6, 2024
- Corning Optical Communications, LLC
- Robert Elvin Barnette
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Programmable output blocks for analog neural memory in a deep learn...
- Patent number 11,893,478
- Issue date Feb 6, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive bias decoder to provide a voltage to a control gate line i...
- Patent number 11,875,852
- Issue date Jan 16, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming methods for neural network using non-volatile memory array
- Patent number 11,853,856
- Issue date Dec 26, 2023
- Silicon Storage Technology, Inc.
- Farnood Merrikh Bayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual ground non-volatile memory array
- Patent number 11,849,577
- Issue date Dec 19, 2023
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Compensation for reference transistors and memory cells in analog n...
- Patent number 11,847,557
- Issue date Dec 19, 2023
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Precise data tuning method and apparatus for analog neural memory i...
- Patent number 11,847,556
- Issue date Dec 19, 2023
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verification of a weight stored in a non-volatile memory cell in a...
- Patent number 11,829,859
- Issue date Nov 28, 2023
- Silicon Storage Technology, Inc.
- Farnood Merrikh Bayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Precision tuning of a page or word of non-volatile memory cells in...
- Patent number 11,798,619
- Issue date Oct 24, 2023
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compensation for reference transistors and memory cells in analog n...
- Patent number 11,797,834
- Issue date Oct 24, 2023
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Output circuitry for non-volatile memory array in neural network
- Patent number 11,790,208
- Issue date Oct 17, 2023
- Silicon Storage Technology, Inc.
- Farnood Merrikh Bayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compensation for leakage in an array of analog neural memory cells...
- Patent number 11,783,904
- Issue date Oct 10, 2023
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Precise programming method and apparatus for analog neural memory i...
- Patent number 11,755,899
- Issue date Sep 12, 2023
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ANALOG COMPUTATION-IN-MEMORY ENGINE AND DIGITAL COMPUTATION-IN-MEMO...
- Publication number 20240338177
- Publication date Oct 10, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MASKING SPARSE INPUTS AND OUTPUTS IN NEURAL NETWORK ARRAY
- Publication number 20240338144
- Publication date Oct 10, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROW DECODER AND ROW ADDRESS SCHEME IN A MEMORY SYSTEM
- Publication number 20240339136
- Publication date Oct 10, 2024
- Silicon Storage Technology, Inc.
- Kha Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
ERASING OF A WORD OR A PAGE OF NON-VOLATILE MEMORY CELLS IN AN ANAL...
- Publication number 20240312517
- Publication date Sep 19, 2024
- Silicon Storage Technology, Inc.
- HIEU VAN TRAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OUTPUT BLOCK FOR ARRAY OF NON-VOLATILE MEMORY CELLS
- Publication number 20240282351
- Publication date Aug 22, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...
- Publication number 20240282369
- Publication date Aug 22, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...
- Publication number 20240274186
- Publication date Aug 15, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...
- Publication number 20240274187
- Publication date Aug 15, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CURRENT-TO-VOLTAGE CONVERTER COMPRISING COMMON MODE CIRCUIT
- Publication number 20240265951
- Publication date Aug 8, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLEXORS FOR NEURAL NETWORK ARRAY
- Publication number 20240256846
- Publication date Aug 1, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CELL ARRAY WITH ROW DIRECTION GAP BETWEEN ERASE GATE LINES A...
- Publication number 20240257880
- Publication date Aug 1, 2024
- Silicon Storage Technology, Inc.
- Louisa Schneider
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANCY FOR AN ARRAY OF NON-VOLATILE MEMORY CELLS USING TAG REGI...
- Publication number 20240256146
- Publication date Aug 1, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARRAY OF NON-VOLATILE MEMORY CELLS TO STORE DATA IN ANALOG FORM AND...
- Publication number 20240220154
- Publication date Jul 4, 2024
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GROUPING AND ERROR CORRECTION FOR NON-VOLATILE MEMORY CELLS
- Publication number 20240168844
- Publication date May 23, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FEMALE HARDENED OPTICAL CONNECTORS FOR USE WITH MALE PLUG CONNECTORS
- Publication number 20240142719
- Publication date May 2, 2024
- Corning Optical Communications LLC
- Robert Elvin Barnette
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Application
ADAPTIVE BIAS DECODER FOR NON-VOLATILE MEMORY SYSTEM
- Publication number 20240127890
- Publication date Apr 18, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE GENERATOR FOR ANALOG NEURAL MEMORY ARRAY
- Publication number 20240119272
- Publication date Apr 11, 2024
- Silicon Stroage Technology, Inc.
- HIEU VAN TRAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programming of a Selected Non-volatile Memory Cell by Changing Prog...
- Publication number 20240120009
- Publication date Apr 11, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple Row Programming Operation In Artificial Neural Network Array
- Publication number 20240112729
- Publication date Apr 4, 2024
- Silicon Storage Technology, Inc.
- Hieu Van TRAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE BIAS DECODER FOR NON-VOLATILE MEMORY SYSTEM
- Publication number 20240112736
- Publication date Apr 4, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
OUTPUT CIRCUIT FOR ARTIFICIAL NEURAL NETWORK ARRAY
- Publication number 20240112003
- Publication date Apr 4, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE BIAS DECODER FOR NON-VOLATILE MEMORY SYSTEM
- Publication number 20240105263
- Publication date Mar 28, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
INPUT CIRCUIT FOR ARTIFICIAL NEURAL NETWORK ARRAY
- Publication number 20240104357
- Publication date Mar 28, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VERIFICATION METHOD AND SYSTEM IN ARTIFICIAL NEURAL NETWORK ARRAY
- Publication number 20240104164
- Publication date Mar 28, 2024
- Silicon Storage Technology, Inc.
- HIEU VAN TRAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INPUT AND OUTPUT BLOCKS FOR AN ARRAY OF MEMORY CELLS
- Publication number 20240098991
- Publication date Mar 21, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK DEVICE
- Publication number 20240095509
- Publication date Mar 21, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OUTPUT CIRCUIT
- Publication number 20240095511
- Publication date Mar 21, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WORD LINE DRIVER FOR VECTOR-BY-MATRIX MULTIPLICATION ARRAY
- Publication number 20240095508
- Publication date Mar 21, 2024
- Silicon Storage Technology, Inc.
- HIEU VAN TRAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK ARRAY COMPRISING ONE OR MORE COARSE CELLS AND ONE OR...
- Publication number 20240079064
- Publication date Mar 7, 2024
- Silicon Storage Technology, Inc.
- HIEU VAN TRAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINATION OF A BIAS VOLTAGE TO APPLY TO ONE OR MORE MEMORY CELLS
- Publication number 20240062812
- Publication date Feb 22, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING

Hieu Vinh Tran

Person

Patents Grantslast 30 patents

Memory cell array with row direction gap between erase gate lines a...

Precise data tuning method and apparatus for analog neural memory i...

Output circuitry for non-volatile memory array in neural network

Decoders for analog neural memory in deep learning artificial neura...

Input and digital output mechanisms for analog neural memory in a d...

Transceiver for providing high voltages for erase or program operat...

Output circuits for an analog neural memory system for deep learnin...

Summing circuit for neural network

Neural network array comprising one or more coarse cells and one or...

Circuitry to compensate for data drift in analog neural memory in a...

Verifying or reading a cell in an analog neural memory in a deep le...

Neural network classifier using array of three-gate non-volatile me...

Hybrid memory system configurable to store neural memory weight dat...

Verification of a weight stored in a non-volatile memory cell in a...

Word line and control gate line tandem decoder for analog neural me...

Precision tuning of a page or word of non-volatile memory cells in...

Neural memory array storing synapsis weights in differential cell p...

Female hardened optical connectors for use with male plug connectors

Programmable output blocks for analog neural memory in a deep learn...

Adaptive bias decoder to provide a voltage to a control gate line i...

Programming methods for neural network using non-volatile memory array

Virtual ground non-volatile memory array

Compensation for reference transistors and memory cells in analog n...

Precise data tuning method and apparatus for analog neural memory i...

Verification of a weight stored in a non-volatile memory cell in a...

Precision tuning of a page or word of non-volatile memory cells in...

Compensation for reference transistors and memory cells in analog n...

Output circuitry for non-volatile memory array in neural network

Compensation for leakage in an array of analog neural memory cells...

Precise programming method and apparatus for analog neural memory i...

Patents Applicationslast 30 patents

ANALOG COMPUTATION-IN-MEMORY ENGINE AND DIGITAL COMPUTATION-IN-MEMO...

MASKING SPARSE INPUTS AND OUTPUTS IN NEURAL NETWORK ARRAY

ROW DECODER AND ROW ADDRESS SCHEME IN A MEMORY SYSTEM

ERASING OF A WORD OR A PAGE OF NON-VOLATILE MEMORY CELLS IN AN ANAL...

OUTPUT BLOCK FOR ARRAY OF NON-VOLATILE MEMORY CELLS

NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...

NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...

NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...

CURRENT-TO-VOLTAGE CONVERTER COMPRISING COMMON MODE CIRCUIT

MULTIPLEXORS FOR NEURAL NETWORK ARRAY

MEMORY CELL ARRAY WITH ROW DIRECTION GAP BETWEEN ERASE GATE LINES A...

REDUNDANCY FOR AN ARRAY OF NON-VOLATILE MEMORY CELLS USING TAG REGI...

ARRAY OF NON-VOLATILE MEMORY CELLS TO STORE DATA IN ANALOG FORM AND...

GROUPING AND ERROR CORRECTION FOR NON-VOLATILE MEMORY CELLS

FEMALE HARDENED OPTICAL CONNECTORS FOR USE WITH MALE PLUG CONNECTORS

ADAPTIVE BIAS DECODER FOR NON-VOLATILE MEMORY SYSTEM

VOLTAGE GENERATOR FOR ANALOG NEURAL MEMORY ARRAY

Programming of a Selected Non-volatile Memory Cell by Changing Prog...

Multiple Row Programming Operation In Artificial Neural Network Array

ADAPTIVE BIAS DECODER FOR NON-VOLATILE MEMORY SYSTEM

OUTPUT CIRCUIT FOR ARTIFICIAL NEURAL NETWORK ARRAY

ADAPTIVE BIAS DECODER FOR NON-VOLATILE MEMORY SYSTEM

INPUT CIRCUIT FOR ARTIFICIAL NEURAL NETWORK ARRAY

VERIFICATION METHOD AND SYSTEM IN ARTIFICIAL NEURAL NETWORK ARRAY

INPUT AND OUTPUT BLOCKS FOR AN ARRAY OF MEMORY CELLS

NEURAL NETWORK DEVICE

OUTPUT CIRCUIT

WORD LINE DRIVER FOR VECTOR-BY-MATRIX MULTIPLICATION ARRAY

NEURAL NETWORK ARRAY COMPRISING ONE OR MORE COARSE CELLS AND ONE OR...

DETERMINATION OF A BIAS VOLTAGE TO APPLY TO ONE OR MORE MEMORY CELLS