Hiroki Wada

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Kanagawa, JP

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and scan test method including writing and rea...
- Patent number 10,295,597
- Issue date May 21, 2019
- Renesas Electronics Corporation
- Yoichi Maeda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit and method for designing the same
- Patent number 9,086,451
- Issue date Jul 21, 2015
- Renesas Electronics Corporation
- Hiroki Wada
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE AND SCAN TEST METHOD
- Publication number 20180059183
- Publication date Mar 1, 2018
- RENESAS ELECTRONICS CORPORATION
- Yoichi MAEDA
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR DESIGNING THE SAME
- Publication number 20130328583
- Publication date Dec 12, 2013
- Hiroki Wada
- G01 - MEASURING TESTING