Hiroo Hayashi

Person

Tokyo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Virtual address cache memory, processor and multiprocessor
- Patent number 9,081,711
- Issue date Jul 14, 2015
- Kabushiki Kaisha Toshiba
- Kenta Yasufuku
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Effective address cache memory, processor and effective address cac...
- Patent number 8,949,572
- Issue date Feb 3, 2015
- Kabushiki Kaisha Toshiba
- Yasuhiko Kurosawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual address cache memory, processor and multiprocessor
- Patent number 8,607,024
- Issue date Dec 10, 2013
- Kabushiki Kaisha Toshiba
- Kenta Yasufuku
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Disabling redundant subfunctional units receiving same input value...
- Patent number 8,429,380
- Issue date Apr 23, 2013
- Kabushiki Kaisha Toshiba
- Hiroo Hayashi
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Systems and methods for transferring data to maintain preferred slo...
- Patent number 8,145,804
- Issue date Mar 27, 2012
- Kabushiki Kaisha Toshiba
- Brian King Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Checkpoint acquisition accelerating apparatus
- Patent number 6,088,773
- Issue date Jul 11, 2000
- Kabushiki Kaisha Toshiba
- Takuya Kano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor system
- Patent number 5,829,032
- Issue date Oct 27, 1998
- Kabushiki Kaisha Toshiba
- Hiroshi Komuro
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
VIRTUAL ADDRESS CACHE MEMORY, PROCESSOR AND MULTIPROCESSOR
- Publication number 20140164702
- Publication date Jun 12, 2014
- Kabushiki Kaisha Toshiba
- Kenta YASUFUKU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL ADDRESS CACHE MEMORY, PROCESSOR AND MULTIPROCESSOR
- Publication number 20110231593
- Publication date Sep 22, 2011
- Kabushiki Kaisha Toshiba
- Kenta YASUFUKU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Transferring Data to Maintain Preferred Slo...
- Publication number 20110072170
- Publication date Mar 24, 2011
- Brian King Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR AND PROCESSOR CONTROL METHOD
- Publication number 20110047349
- Publication date Feb 24, 2011
- Kabushiki Kaisha Toshiba
- Hiroo HAYASHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFECTIVE ADDRESS CACHE MEMORY, PROCESSOR AND EFFECTIVE ADDRESS CAC...
- Publication number 20100100685
- Publication date Apr 22, 2010
- Kabushihiki Kaisha Toshiba
- Yasuhiko Kurosawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SET ASSOCIATIVE CACHE APPARATUS, SET ASSOCIATIVE CACHE METHOD AND P...
- Publication number 20100100684
- Publication date Apr 22, 2010
- Kabushiki Kaisha Toshiba
- Yasuhiko Kurosawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for dynamically choosing between varying processor error res...
- Publication number 20070088989
- Publication date Apr 19, 2007
- Christopher M. Abernathy
- G06 - COMPUTING CALCULATING COUNTING

Hiroo Hayashi

Person

Patents Grantslast 30 patents

Virtual address cache memory, processor and multiprocessor

Effective address cache memory, processor and effective address cac...

Virtual address cache memory, processor and multiprocessor

Disabling redundant subfunctional units receiving same input value...

Systems and methods for transferring data to maintain preferred slo...

Checkpoint acquisition accelerating apparatus

Multiprocessor system

Patents Applicationslast 30 patents

VIRTUAL ADDRESS CACHE MEMORY, PROCESSOR AND MULTIPROCESSOR

VIRTUAL ADDRESS CACHE MEMORY, PROCESSOR AND MULTIPROCESSOR

Systems and Methods for Transferring Data to Maintain Preferred Slo...

PROCESSOR AND PROCESSOR CONTROL METHOD

EFFECTIVE ADDRESS CACHE MEMORY, PROCESSOR AND EFFECTIVE ADDRESS CAC...

SET ASSOCIATIVE CACHE APPARATUS, SET ASSOCIATIVE CACHE METHOD AND P...

Method for dynamically choosing between varying processor error res...