HIROSHI AKAMATSU

Person

BOISE, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Circuitry including a level shifter and logic, configured to receiv...
- Patent number 12,165,693
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses for sense amplifier voltage control
- Patent number 12,165,695
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Sang-Kyun Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent compensation in a memory system
- Patent number 11,967,356
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Command triggered power gating for a memory device
- Patent number 11,935,614
- Issue date Mar 19, 2024
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Charge transfer between gate terminals of sub-threshold current red...
- Patent number 11,777,488
- Issue date Oct 3, 2023
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods including dice latches in a semiconductor d...
- Patent number 11,727,967
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Yoshiro Riho
- G11 - INFORMATION STORAGE
Information Patent Grant
Generating memory array control signals
- Patent number 11,687,289
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Leakage current reduction in electronic devices
- Patent number 11,658,662
- Issue date May 23, 2023
- Micron Technology, Inc.
- Hiroshi Akamatsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Quarter match concurrent compensation in a memory system
- Patent number 11,626,154
- Issue date Apr 11, 2023
- Micron Technology, Inc.
- Jacob Rice
- G11 - INFORMATION STORAGE
Information Patent Grant
Boundary protection in memory
- Patent number 11,615,828
- Issue date Mar 28, 2023
- Micron Technology, Inc.
- Ki-Jun Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Column selector architecture with edge mat optimization
- Patent number 11,538,516
- Issue date Dec 27, 2022
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Grant
Command triggered power gating for a memory device
- Patent number 11,423,953
- Issue date Aug 23, 2022
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Column selector architecture with edge mat optimization
- Patent number 11,361,814
- Issue date Jun 14, 2022
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay circuits, and related semiconductor devices and methods
- Patent number 11,342,906
- Issue date May 24, 2022
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Charge transfer between gate terminals of subthreshold current redu...
- Patent number 11,290,103
- Issue date Mar 29, 2022
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temperature-based access timing for a memory device
- Patent number 11,282,560
- Issue date Mar 22, 2022
- Micron Technology, Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus with latch balancing mechanism and methods for operating...
- Patent number 11,282,569
- Issue date Mar 22, 2022
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Grant
Generating memory array control signals
- Patent number 11,210,029
- Issue date Dec 28, 2021
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boundary protection in memory
- Patent number 11,176,985
- Issue date Nov 16, 2021
- Micron Technology, Inc.
- Ki-Jun Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay calibration oscillators for a memory device
- Patent number 11,152,040
- Issue date Oct 19, 2021
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device latch circuitry
- Patent number 11,087,835
- Issue date Aug 10, 2021
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay calibration oscillators for a memory device
- Patent number 11,011,212
- Issue date May 18, 2021
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device, delay circuit, and related method
- Patent number 10,998,893
- Issue date May 4, 2021
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Temperature-based access timing for a memory device
- Patent number 10,978,130
- Issue date Apr 13, 2021
- Micron Technology, Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Grant
Fuse latch circuits and related apparatuses, systems, and methods
- Patent number 10,937,515
- Issue date Mar 2, 2021
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods for controlling refresh operations
- Patent number 10,867,660
- Issue date Dec 15, 2020
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Leakage current reduction in electronic devices
- Patent number 10,848,153
- Issue date Nov 24, 2020
- Micron Technology, Inc.
- Hiroshi Akamatsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory device latch circuitry
- Patent number 10,734,067
- Issue date Aug 4, 2020
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for controlling refresh operations
- Patent number 10,607,686
- Issue date Mar 31, 2020
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for controlling refresh operations
- Patent number 10,153,031
- Issue date Dec 11, 2018
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CONCURRENT COMPENSATION IN A MEMORY SYSTEM
- Publication number 20240274720
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Hiroshi Akamatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUSES AND METHODS FOR INCREASED RELIABILITY ROW HAMMER COUNTS
- Publication number 20240212738
- Publication date Jun 27, 2024
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR SHARED ROW AND COLUMN ADDRESS BUSES
- Publication number 20240192874
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES FOR SENSE AMPLIFIER VOLTAGE CONTROL
- Publication number 20230360691
- Publication date Nov 9, 2023
- Micron Technology, Inc.
- Sang-Kyun Park
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS INCLUDING DICE LATCHES IN A SEMICONDUCTOR D...
- Publication number 20230343376
- Publication date Oct 26, 2023
- Micron Technology, Inc.
- Yoshiro Riho
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS INCLUDING DICE LATCHES IN A SEMICONDUCTOR D...
- Publication number 20230223059
- Publication date Jul 13, 2023
- Micron Technology, Inc.
- Yoshiro Riho
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUITRY INCLUDING A LEVEL SHIFTER AND LOGIC, AND ASSOCIATED METHO...
- Publication number 20230178141
- Publication date Jun 8, 2023
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT COMPENSATION IN A MEMORY SYSTEM
- Publication number 20220406358
- Publication date Dec 22, 2022
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Application
QUARTER MATCH CONCURRENT COMPENSATION IN A MEMORY SYSTEM
- Publication number 20220406359
- Publication date Dec 22, 2022
- Micron Technology, Inc.
- Jacob Rice
- G11 - INFORMATION STORAGE
Information Patent Application
COMMAND TRIGGERED POWER GATING FOR A MEMORY DEVICE
- Publication number 20220366943
- Publication date Nov 17, 2022
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COLUMN SELECTOR ARCHITECTURE WITH EDGE MAT OPTIMIZATION
- Publication number 20220293163
- Publication date Sep 15, 2022
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Application
CHARGE TRANSFER BETWEEN GATE TERMINALS OF SUB-THRESHOLD CURRENT RED...
- Publication number 20220216864
- Publication date Jul 7, 2022
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING MEMORY ARRAY CONTROL SIGNALS
- Publication number 20220188036
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- HIROSHI AKAMATSU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUB-THRESHOLD CURRENT REDUCTION CIRCUIT SWITCHES AND RELATED APPARA...
- Publication number 20220158631
- Publication date May 19, 2022
- Micron Technology, Inc.
- Yoshihiro Shibata
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COLUMN SELECTOR ARCHITECTURE WITH EDGE MAT OPTIMIZATION
- Publication number 20220139444
- Publication date May 5, 2022
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Application
BOUNDARY PROTECTION IN MEMORY
- Publication number 20220076725
- Publication date Mar 10, 2022
- Micron Technology, Inc.
- Ki-Jun Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMAND TRIGGERED POWER GATING FOR A MEMORY DEVICE
- Publication number 20210375332
- Publication date Dec 2, 2021
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING MEMORY ARRAY CONTROL SIGNALS
- Publication number 20210357150
- Publication date Nov 18, 2021
- Micron Technology, Inc.
- HIROSHI AKAMATSU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEMPERATURE-BASED ACCESS TIMING FOR A MEMORY DEVICE
- Publication number 20210304806
- Publication date Sep 30, 2021
- Micron Technology, Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS WITH LATCH BALANCING MECHANISM AND METHODS FOR OPERATING...
- Publication number 20210233581
- Publication date Jul 29, 2021
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Application
DELAY CIRCUITS, AND RELATED SEMICONDUCTOR DEVICES AND METHODS
- Publication number 20210203316
- Publication date Jul 1, 2021
- Micron Technology, Inc.
- Hiroshi Akamatsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY DEVICE LATCH CIRCUITRY
- Publication number 20210065786
- Publication date Mar 4, 2021
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Application
LEAKAGE CURRENT REDUCTION IN ELECTRONIC DEVICES
- Publication number 20210044296
- Publication date Feb 11, 2021
- Micron Technology, Inc.
- Hiroshi Akamatsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE, DELAY CIRCUIT, AND RELATED METHOD
- Publication number 20200304113
- Publication date Sep 24, 2020
- Micron Technology, Inc.
- Hiroshi Akamatsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
3APPARATUSES AND METHODS FOR CONTROLLING REFRESH OPERATIONS
- Publication number 20200194050
- Publication date Jun 18, 2020
- Micron Technology, Inc.
- HIROSHI AKAMATSU
- G11 - INFORMATION STORAGE
Information Patent Application
LEAKAGE CURRENT REDUCTION IN ELECTRONIC DEVICES
- Publication number 20200177184
- Publication date Jun 4, 2020
- Micron Technology, Inc.
- Hiroshi Akamatsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUSES AND METHODS FOR CONTROLLING REFRESH OPERATIONS
- Publication number 20190013059
- Publication date Jan 10, 2019
- Micron Technology, Inc.
- HIROSHI AKAMATSU
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR CONTROLLING REFRESH OPERATIONS
- Publication number 20180158504
- Publication date Jun 7, 2018
- Micron Technology, Inc.
- HIROSHI AKAMATSU
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING FUSE CIRCUIT
- Publication number 20180075922
- Publication date Mar 15, 2018
- Micron Technology, Inc.
- HIROSHI AKAMATSU
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING FUSE CIRCUIT
- Publication number 20170316836
- Publication date Nov 2, 2017
- Micron Technology, Inc.
- HIROSHI AKAMATSU
- G11 - INFORMATION STORAGE

HIROSHI AKAMATSU

Person

Patents Grantslast 30 patents

Circuitry including a level shifter and logic, configured to receiv...

Apparatuses for sense amplifier voltage control

Concurrent compensation in a memory system

Command triggered power gating for a memory device

Charge transfer between gate terminals of sub-threshold current red...

Apparatuses and methods including dice latches in a semiconductor d...

Generating memory array control signals

Leakage current reduction in electronic devices

Quarter match concurrent compensation in a memory system

Boundary protection in memory

Column selector architecture with edge mat optimization

Command triggered power gating for a memory device

Column selector architecture with edge mat optimization

Delay circuits, and related semiconductor devices and methods

Charge transfer between gate terminals of subthreshold current redu...

Temperature-based access timing for a memory device

Apparatus with latch balancing mechanism and methods for operating...

Generating memory array control signals

Boundary protection in memory

Delay calibration oscillators for a memory device

Memory device latch circuitry

Delay calibration oscillators for a memory device

Semiconductor device, delay circuit, and related method

Temperature-based access timing for a memory device

Fuse latch circuits and related apparatuses, systems, and methods

Apparatus and methods for controlling refresh operations

Leakage current reduction in electronic devices

Memory device latch circuitry

Apparatuses and methods for controlling refresh operations

Apparatuses and methods for controlling refresh operations

Patents Applicationslast 30 patents

CONCURRENT COMPENSATION IN A MEMORY SYSTEM

APPARATUSES AND METHODS FOR INCREASED RELIABILITY ROW HAMMER COUNTS

APPARATUSES AND METHODS FOR SHARED ROW AND COLUMN ADDRESS BUSES

APPARATUSES FOR SENSE AMPLIFIER VOLTAGE CONTROL

APPARATUSES AND METHODS INCLUDING DICE LATCHES IN A SEMICONDUCTOR D...

APPARATUSES AND METHODS INCLUDING DICE LATCHES IN A SEMICONDUCTOR D...

CIRCUITRY INCLUDING A LEVEL SHIFTER AND LOGIC, AND ASSOCIATED METHO...

CONCURRENT COMPENSATION IN A MEMORY SYSTEM

QUARTER MATCH CONCURRENT COMPENSATION IN A MEMORY SYSTEM

COMMAND TRIGGERED POWER GATING FOR A MEMORY DEVICE

COLUMN SELECTOR ARCHITECTURE WITH EDGE MAT OPTIMIZATION

CHARGE TRANSFER BETWEEN GATE TERMINALS OF SUB-THRESHOLD CURRENT RED...

GENERATING MEMORY ARRAY CONTROL SIGNALS

SUB-THRESHOLD CURRENT REDUCTION CIRCUIT SWITCHES AND RELATED APPARA...

COLUMN SELECTOR ARCHITECTURE WITH EDGE MAT OPTIMIZATION

BOUNDARY PROTECTION IN MEMORY

COMMAND TRIGGERED POWER GATING FOR A MEMORY DEVICE

GENERATING MEMORY ARRAY CONTROL SIGNALS

TEMPERATURE-BASED ACCESS TIMING FOR A MEMORY DEVICE

APPARATUS WITH LATCH BALANCING MECHANISM AND METHODS FOR OPERATING...

DELAY CIRCUITS, AND RELATED SEMICONDUCTOR DEVICES AND METHODS

MEMORY DEVICE LATCH CIRCUITRY

LEAKAGE CURRENT REDUCTION IN ELECTRONIC DEVICES

SEMICONDUCTOR DEVICE, DELAY CIRCUIT, AND RELATED METHOD

3APPARATUSES AND METHODS FOR CONTROLLING REFRESH OPERATIONS

LEAKAGE CURRENT REDUCTION IN ELECTRONIC DEVICES

APPARATUSES AND METHODS FOR CONTROLLING REFRESH OPERATIONS

APPARATUSES AND METHODS FOR CONTROLLING REFRESH OPERATIONS

SEMICONDUCTOR DEVICE INCLUDING FUSE CIRCUIT

SEMICONDUCTOR DEVICE INCLUDING FUSE CIRCUIT