Hiroshi Matsumiya

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for quantifying the timing error induced by an...
- Patent number 7,536,663
- Issue date May 19, 2009
- Verigy (Singapore) Pte. Ltd.
- Hiroshi Matsumiya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for quantifying the timing error induced by cr...
- Patent number 7,251,798
- Issue date Jul 31, 2007
- Verigy (Singapore) Pte. Ltd.
- Hiroshi Matsumiya
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method and apparatus for quantifying the timing error induced by cr...
- Publication number 20060195805
- Publication date Aug 31, 2006
- Hiroshi Matsumiya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for quantifying the timing error induced by an...
- Publication number 20060195806
- Publication date Aug 31, 2006
- Hiroshi Matsumiya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE