Hiroshi Shimizu

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Kanagawa-ken, JP

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Patents Grantslast 30 patents

Information Patent Grant
Memory system, memory controller, and synchronizing apparatus
- Patent number 8,649,241
- Issue date Feb 11, 2014
- Kabushiki Kaisha Toshiba
- Katsuhiko Sakimoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Scan test circuit and method of arranging the same
- Patent number 7,584,393
- Issue date Sep 1, 2009
- Kabushiki Kaisha Toshiba
- Tetsuo Kamada
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY SYSTEM, MEMORY CONTROLLER, AND SYNCHRONIZING APPARATUS
- Publication number 20120246367
- Publication date Sep 27, 2012
- Kabushiki Kaisha Toshiba
- Katsuhiko SAKIMOTO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE, DATA TRANSFER DEVICE, AND METHOD OF CO...
- Publication number 20100169550
- Publication date Jul 1, 2010
- Kabushiki Kaisha Toshiba
- Shingo Akita
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCAN TEST CIRCUIT AND METHOD OF ARRANGING THE SAME
- Publication number 20070011524
- Publication date Jan 11, 2007
- Kabushiki Kaisha Toshiba
- Tetsuo Kamada
- G01 - MEASURING TESTING