Hiroshige Fujii

Person

Tokyo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor integrated circuit device having clock buffers and me...
- Patent number 7,685,552
- Issue date Mar 23, 2010
- Kabushiki Kaisha Toshiba
- Fujio Ishihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Information processing apparatus
- Patent number 6,393,521
- Issue date May 21, 2002
- Kabushiki Kaisha Toshiba
- Hiroshige Fujii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable integrated circuit and method of testing the same
- Patent number 6,349,395
- Issue date Feb 19, 2002
- Kabushiki Kaisha Toshiba
- Kazunori Ohuchi
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor integrated circuit for cryptographic process and encr...
- Patent number 6,327,654
- Issue date Dec 4, 2001
- Kabushiki Kaisha Toshiba
- Yukihito Oowaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor and information processing apparatus with a reconfigurabl...
- Patent number 6,157,997
- Issue date Dec 5, 2000
- Kabushiki Kaisha Toshiba
- Yukihito Oowaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit and test method therefor
- Patent number 6,112,163
- Issue date Aug 29, 2000
- Kabushiki Kaisha Toshiba
- Yukihito Oowaki
- G01 - MEASURING TESTING
Information Patent Grant
Processor having bug avoidance function and method for avoiding bug...
- Patent number 6,026,480
- Issue date Feb 15, 2000
- Kabushiki Kaisha Toshiba
- Yukihito Oowaki
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF DESIGNING THE...
- Publication number 20070240087
- Publication date Oct 11, 2007
- Kabushiki Kaisha Toshiba
- Fujio ISHIHARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE INTEGRATED CIRCUIT AND METHOD OF TESTING THE SAME
- Publication number 20020010885
- Publication date Jan 24, 2002
- KAZUNORI OHUCHI
- G01 - MEASURING TESTING

Hiroshige Fujii

Person

Patents Grantslast 30 patents

Semiconductor integrated circuit device having clock buffers and me...

Information processing apparatus

Configurable integrated circuit and method of testing the same

Semiconductor integrated circuit for cryptographic process and encr...

Processor and information processing apparatus with a reconfigurabl...

Semiconductor integrated circuit and test method therefor

Processor having bug avoidance function and method for avoiding bug...

Patents Applicationslast 30 patents

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF DESIGNING THE...

CONFIGURABLE INTEGRATED CIRCUIT AND METHOD OF TESTING THE SAME