HIROYUKI AKATSU

Person

MOHEGAN LAKE, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of fabricating self-aligned bipolar transistor having tapere...
- Patent number 7,615,457
- Issue date Nov 10, 2009
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Top-oxide-early process and array top oxide planarization
- Patent number 7,601,646
- Issue date Oct 13, 2009
- International Business Machines Corporation
- Deok-kee Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a bipolar transistor having reduced collector...
- Patent number 7,462,547
- Issue date Dec 9, 2008
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method of self-aligned bipolar transistor having tape...
- Patent number 7,425,754
- Issue date Sep 16, 2008
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bipolar transistor having reduced collector-base capacitance
- Patent number 7,190,046
- Issue date Mar 13, 2007
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for improved trench processing
- Patent number 6,967,136
- Issue date Nov 22, 2005
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
STI formation for vertical and planar transistors
- Patent number 6,893,938
- Issue date May 17, 2005
- Infineon Technologies AG
- Munir D. Naeem
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical semiconductor devices
- Patent number 6,887,761
- Issue date May 3, 2005
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Removal of post-rie polymer on A1/CU metal line
- Patent number 6,849,153
- Issue date Feb 1, 2005
- Siemens Aktiengesellschaft
- Ravikumar Ramachandran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned borderless contacts
- Patent number 6,809,027
- Issue date Oct 26, 2004
- International Business Machines Corporation
- Jay W. Strane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making self-aligned borderless contacts
- Patent number 6,806,177
- Issue date Oct 19, 2004
- International Business Machines Corporation
- Jay W. Strane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration scheme for enhancing capacitance of trench capacitors
- Patent number 6,806,138
- Issue date Oct 19, 2004
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical hard mask
- Patent number 6,723,611
- Issue date Apr 20, 2004
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for preventing strap-to-strap punch through in vertical DRAMs
- Patent number 6,724,031
- Issue date Apr 20, 2004
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to self-align a lithographic pattern to a workpiece
- Patent number 6,485,894
- Issue date Nov 26, 2002
- International Business Machines Corporation
- Hiroyuki Akatsu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
DRAM direct sensing scheme
- Patent number 6,449,202
- Issue date Sep 10, 2002
- International Business Machines Corporation
- Hiroyuki Akatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Process of forming an ultra-shallow junction dopant layer having a...
- Patent number 6,387,782
- Issue date May 14, 2002
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hydrogen peroxide and acid etchant for a wet etch process
- Patent number 6,379,577
- Issue date Apr 30, 2002
- International Business Machines Corporation
- Hiroyuki Akatsu
- C04 - CEMENTS CONCRETE ARTIFICIAL STONE CERAMICS REFRACTORIES
Information Patent Grant
Method of manufacturing a semiconductor device including a seamless...
- Patent number 6,333,274
- Issue date Dec 25, 2001
- Kabushiki Kaisha Toshiba
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra-shallow junction dopant layer having a peak concentration wit...
- Patent number 6,329,704
- Issue date Dec 11, 2001
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned channel implantation
- Patent number 6,329,271
- Issue date Dec 11, 2001
- Infineon Technologies AG
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for producing low leakage isolation devices
- Patent number 6,319,794
- Issue date Nov 20, 2001
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self aligned channel implantation
- Patent number 6,297,530
- Issue date Oct 2, 2001
- Infineon Technologies North America Corp.
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Disposable spacers for improved array gapfill in high density DRAMs
- Patent number 6,281,084
- Issue date Aug 28, 2001
- Infineon Technologies Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductors for microelectronic circuits and method of manufacture
- Patent number 6,060,388
- Issue date May 9, 2000
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer cleaning with dissolved gas concentration control
- Patent number 6,039,055
- Issue date Mar 21, 2000
- International Business Machines Corporation
- Hiroyuki Akatsu
- B08 - CLEANING
Information Patent Grant
Wafer cleaning system with progressive megasonic wave
- Patent number 6,021,789
- Issue date Feb 8, 2000
- International Business Machines Corporation
- Hiroyuki Akatsu
- B08 - CLEANING
Information Patent Grant
Removal of post-RIE polymer on Al/Cu metal line
- Patent number 5,980,770
- Issue date Nov 9, 1999
- Siemens Aktiengesellschaft
- Ravikumar Ramachandran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for improved washing and drying of semiconduct...
- Patent number 5,934,299
- Issue date Aug 10, 1999
- Siemens Aktiengesellschaft
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to minimize watermarks on silicon substrates
- Patent number 5,932,493
- Issue date Aug 3, 1999
- International Business Machines Corporaiton
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method of fabricating self-aligned bipolar transistor having tapere...
- Publication number 20080318373
- Publication date Dec 25, 2008
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fabrication of bipolar transistor having reduced collector-base cap...
- Publication number 20070096259
- Publication date May 3, 2007
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TOP-OXIDE-EARLY PROCESS AND ARRAY TOP OXIDE PLANARIZATION
- Publication number 20060019443
- Publication date Jan 26, 2006
- International Business Machines Corporation
- Deok-kee Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD OF MAKING A BIPOLAR TRANSISTOR HAVING REDUCED...
- Publication number 20050212087
- Publication date Sep 29, 2005
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD OF SELF-ALIGNED BIPOLAR TRANSISTOR HAVING TAPE...
- Publication number 20050184359
- Publication date Aug 25, 2005
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND STRUCTURE FOR IMPROVED TRENCH PROCESSING
- Publication number 20050026382
- Publication date Feb 3, 2005
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STI formation for vertical and planar transistors
- Publication number 20040209486
- Publication date Oct 21, 2004
- Munir D. Naeem
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-aligned borderless contacts
- Publication number 20040104409
- Publication date Jun 3, 2004
- International Business Machines Corporation
- Jay W. Strane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL HARD MASK
- Publication number 20040048441
- Publication date Mar 11, 2004
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-aligned borderless contacts
- Publication number 20030228752
- Publication date Dec 11, 2003
- International Business Machines Corporation
- Jay W. Strane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reducing threshold voltage roll-up/roll-off effect for MOSFETS
- Publication number 20020177264
- Publication date Nov 28, 2002
- International Business Machines Corporation
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYDROGEN PEROXIDE AND ACID ETCHANT FOR A WET ETCH PROCESS
- Publication number 20010037995
- Publication date Nov 8, 2001
- HIROYUKI AKATSU
- C04 - CEMENTS CONCRETE ARTIFICIAL STONE CERAMICS REFRACTORIES
Information Patent Application
Process of forming an ultra-shallow junction dopant layer having a...
- Publication number 20010030333
- Publication date Oct 18, 2001
- Hiroyuki Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING A SEAMLESS...
- Publication number 20010023134
- Publication date Sep 20, 2001
- HIROYUKI AKATSU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REMOVAL OF POST-RIE POLYMER ON A1/CU METAL LINE
- Publication number 20010006166
- Publication date Jul 5, 2001
- RAVIKUMAR RAMACHANDRAN
- H01 - BASIC ELECTRIC ELEMENTS

HIROYUKI AKATSU

Person

Patents Grantslast 30 patents

Method of fabricating self-aligned bipolar transistor having tapere...

Top-oxide-early process and array top oxide planarization

Method of fabricating a bipolar transistor having reduced collector...

Structure and method of self-aligned bipolar transistor having tape...

Bipolar transistor having reduced collector-base capacitance

Method and structure for improved trench processing

STI formation for vertical and planar transistors

Vertical semiconductor devices

Removal of post-rie polymer on A1/CU metal line

Self-aligned borderless contacts

Method of making self-aligned borderless contacts

Integration scheme for enhancing capacitance of trench capacitors

Vertical hard mask

Method for preventing strap-to-strap punch through in vertical DRAMs

Method to self-align a lithographic pattern to a workpiece

DRAM direct sensing scheme

Process of forming an ultra-shallow junction dopant layer having a...

Hydrogen peroxide and acid etchant for a wet etch process

Method of manufacturing a semiconductor device including a seamless...

Ultra-shallow junction dopant layer having a peak concentration wit...

Self-aligned channel implantation

Structure and method for producing low leakage isolation devices

Self aligned channel implantation

Disposable spacers for improved array gapfill in high density DRAMs

Conductors for microelectronic circuits and method of manufacture

Wafer cleaning with dissolved gas concentration control

Wafer cleaning system with progressive megasonic wave

Removal of post-RIE polymer on Al/Cu metal line

Apparatus and method for improved washing and drying of semiconduct...

Method to minimize watermarks on silicon substrates

Patents Applicationslast 30 patents

Method of fabricating self-aligned bipolar transistor having tapere...

Fabrication of bipolar transistor having reduced collector-base cap...

TOP-OXIDE-EARLY PROCESS AND ARRAY TOP OXIDE PLANARIZATION

STRUCTURE AND METHOD OF MAKING A BIPOLAR TRANSISTOR HAVING REDUCED...

STRUCTURE AND METHOD OF SELF-ALIGNED BIPOLAR TRANSISTOR HAVING TAPE...

METHOD AND STRUCTURE FOR IMPROVED TRENCH PROCESSING

STI formation for vertical and planar transistors

Self-aligned borderless contacts

VERTICAL HARD MASK

Self-aligned borderless contacts

Reducing threshold voltage roll-up/roll-off effect for MOSFETS

HYDROGEN PEROXIDE AND ACID ETCHANT FOR A WET ETCH PROCESS

Process of forming an ultra-shallow junction dopant layer having a...

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING A SEAMLESS...

REMOVAL OF POST-RIE POLYMER ON A1/CU METAL LINE