Hisashi Yamauchi

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Kanagawa, JP

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Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit
- Patent number 8,238,177
- Issue date Aug 7, 2012
- Renesas Electronics Corporation
- Hisashi Yamauchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device for build-in fault diagnosis
- Patent number 7,562,256
- Issue date Jul 14, 2009
- NEC Electronics Corporation
- Hisashi Yamauchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuit and test method
- Patent number 7,475,300
- Issue date Jan 6, 2009
- NEC Electronics Corporation
- Hisashi Yamauchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of generating test pattern for integrated circuit
- Patent number 7,024,606
- Issue date Apr 4, 2006
- NEC Electronics Corporation
- Hisashi Yamauchi
- G01 - MEASURING TESTING
Information Patent Grant
Delay test system for normal circuit
- Patent number 6,574,169
- Issue date Jun 3, 2003
- NEC Electronics Corporation
- Hisashi Yamauchi
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Integrated circuit
- Publication number 20100254205
- Publication date Oct 7, 2010
- NEC Electronics Corporation
- Hisashi Yamauchi
- G11 - INFORMATION STORAGE
Information Patent Application
Test circuit and test method
- Publication number 20070033462
- Publication date Feb 8, 2007
- NEC ELECTRONICS CORPORATION
- Hisashi Yamauchi
- G01 - MEASURING TESTING
Information Patent Application
Semiconductor memory device for build-in fault diagnosis
- Publication number 20050262422
- Publication date Nov 24, 2005
- NEC Electronics Corporation
- Hisashi Yamauchi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit device and test method thereof
- Publication number 20050235184
- Publication date Oct 20, 2005
- NEC Electronics Corporation
- Hisashi Yamauchi
- G01 - MEASURING TESTING