Ho-Seop Kim

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Controlling access requests of request nodes
- Patent number 11,543,994
- Issue date Jan 3, 2023
- ARM Limited
- Ho-Seop Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, apparatuses, and methods for a hardware and software syste...
- Patent number 10,725,755
- Issue date Jul 28, 2020
- Intel Corporation
- David J. Sager
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, apparatuses, and methods for a hardware and software syste...
- Patent number 9,672,019
- Issue date Jun 6, 2017
- Intel Corporation
- David J. Sager
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for store dependence prediction
- Patent number 9,619,750
- Issue date Apr 11, 2017
- Intel Corporation
- Ho-Seop Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Balanced P-LRU tree for a “multiple of 3” number of ways cache
- Patent number 9,348,766
- Issue date May 24, 2016
- Intel Corporation
- Adi Basel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection of memory address aliasing and violations of data depende...
- Patent number 9,292,294
- Issue date Mar 22, 2016
- Intel Corporation
- Muawya M. Al-Otoom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store address prediction for memory disambiguation in a processing...
- Patent number 9,244,827
- Issue date Jan 26, 2016
- Intel Corporation
- Ho-Seop Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to form a resilient objective instruction con...
- Patent number 8,935,678
- Issue date Jan 13, 2015
- Intel Corporation
- Youfeng Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software flow tracking using multiple threads
- Patent number 8,321,840
- Issue date Nov 27, 2012
- Intel Corporation
- Vijayanand Nagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to form a resilient objective instruction con...
- Patent number 8,156,480
- Issue date Apr 10, 2012
- Intel Corporation
- Youfeng Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-demand emulation via user-level exception handling
- Patent number 8,146,106
- Issue date Mar 27, 2012
- Intel Corporation
- Ho-Seop Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using transactional memory for precise exception handling in aggres...
- Patent number 7,865,885
- Issue date Jan 4, 2011
- Intel Corporation
- Youfeng Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for dynamic binary translator to support preci...
- Patent number 7,757,221
- Issue date Jul 13, 2010
- Intel Corporation
- Bixia Zheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-pass MRET trace selection for dynamic optimization
- Patent number 7,694,281
- Issue date Apr 6, 2010
- Intel Corporation
- Cheng Wang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS FOR TRANSFERRING DATA WITHIN HIERARCHICAL CAC...
- Publication number 20230418766
- Publication date Dec 28, 2023
- ARM LIMITED
- Joseph Michael PUSDESRIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING ACCESS REQUESTS OF REQUEST NODES
- Publication number 20220129186
- Publication date Apr 28, 2022
- ARM Limited
- Ho-Seop KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR A HARDWARE AND SOFTWARE SYSTE...
- Publication number 20180060049
- Publication date Mar 1, 2018
- Intel Corporation
- DAVID J. SAGER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORE ADDRESS PREDICTION FOR MEMORY DISAMBIGUATION IN A PROCESSING...
- Publication number 20150089186
- Publication date Mar 26, 2015
- Ho-Seop Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR STORE DEPENDENCE PREDICTION
- Publication number 20150006452
- Publication date Jan 1, 2015
- Ho-Seop KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BALANCED P-LRU TREE FOR A "MULTIPLE OF 3" NUMBER OF WAYS CACHE
- Publication number 20140215161
- Publication date Jul 31, 2014
- Adi Basel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ADDRESS ALIASING DETECTION
- Publication number 20140089271
- Publication date Mar 27, 2014
- Muawya M. AL-OTOOM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FORM A RESILIENT OBJECTIVE INSTRUCTION CON...
- Publication number 20120198426
- Publication date Aug 2, 2012
- Youfeng Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR A HARDWARE AND SOFTWARE SYSTE...
- Publication number 20110167416
- Publication date Jul 7, 2011
- David J. Sager
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFTWARE FLOW TRACKING USING MULTIPLE THREADS
- Publication number 20090172644
- Publication date Jul 2, 2009
- Vijayanand Nagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-DEMAND EMULATION VIA USER-LEVEL EXCEPTION HANDLING
- Publication number 20090172713
- Publication date Jul 2, 2009
- Ho-Seop Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FORM A RESILIENT OBJECTIVE INSTRUCTION CON...
- Publication number 20080127132
- Publication date May 29, 2008
- Youfeng Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using transactional memory for precise exception handling in aggres...
- Publication number 20080126764
- Publication date May 29, 2008
- Youfeng Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing dynamic information flow tracking
- Publication number 20070240141
- Publication date Oct 11, 2007
- Feng Qin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Two-pass MRET trace selection for dynamic optimization
- Publication number 20070079293
- Publication date Apr 5, 2007
- Cheng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for dynamic binary translator to support preci...
- Publication number 20070079304
- Publication date Apr 5, 2007
- Bixia Zheng
- G06 - COMPUTING CALCULATING COUNTING

Ho-Seop Kim

Person

Patents Grantslast 30 patents

Controlling access requests of request nodes

Systems, apparatuses, and methods for a hardware and software syste...

Systems, apparatuses, and methods for a hardware and software syste...

Method and apparatus for store dependence prediction

Balanced P-LRU tree for a “multiple of 3” number of ways cache

Detection of memory address aliasing and violations of data depende...

Store address prediction for memory disambiguation in a processing...

Methods and apparatus to form a resilient objective instruction con...

Software flow tracking using multiple threads

Methods and apparatus to form a resilient objective instruction con...

On-demand emulation via user-level exception handling

Using transactional memory for precise exception handling in aggres...

Apparatus and method for dynamic binary translator to support preci...

Two-pass MRET trace selection for dynamic optimization

Patents Applicationslast 30 patents

METHODS AND APPARATUS FOR TRANSFERRING DATA WITHIN HIERARCHICAL CAC...

CONTROLLING ACCESS REQUESTS OF REQUEST NODES

SYSTEMS, APPARATUSES, AND METHODS FOR A HARDWARE AND SOFTWARE SYSTE...

STORE ADDRESS PREDICTION FOR MEMORY DISAMBIGUATION IN A PROCESSING...

METHOD AND APPARATUS FOR STORE DEPENDENCE PREDICTION

BALANCED P-LRU TREE FOR A "MULTIPLE OF 3" NUMBER OF WAYS CACHE

MEMORY ADDRESS ALIASING DETECTION

METHODS AND APPARATUS TO FORM A RESILIENT OBJECTIVE INSTRUCTION CON...

SYSTEMS, APPARATUSES, AND METHODS FOR A HARDWARE AND SOFTWARE SYSTE...

SOFTWARE FLOW TRACKING USING MULTIPLE THREADS

ON-DEMAND EMULATION VIA USER-LEVEL EXCEPTION HANDLING

METHODS AND APPARATUS TO FORM A RESILIENT OBJECTIVE INSTRUCTION CON...

Using transactional memory for precise exception handling in aggres...

Performing dynamic information flow tracking

Two-pass MRET trace selection for dynamic optimization

Apparatus and method for dynamic binary translator to support preci...