Ho-sun Jeong

Person

Taegu, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Flash type analog-to-digital converter having MOS comparators
- Patent number 5,237,326
- Issue date Aug 17, 1993
- Samsung Electronics Co., Ltd.
- Ho-sun Jeong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pattern classifier for character recognition
- Patent number 5,235,650
- Issue date Aug 10, 1993
- Samsung Electronics Co. Ltd.
- Ho-sun Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
MOS decoder circuit implemented using a neural network architecture
- Patent number 5,168,551
- Issue date Dec 1, 1992
- Samsung Electronics Co., Ltd.
- Ho-sun Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Discrete cosine transform chip using neural network concepts for ca...
- Patent number 5,166,896
- Issue date Nov 24, 1992
- Samsung Electronics Co., Ltd.
- Ho-Sun Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit for square root operation using neural network
- Patent number 5,151,874
- Issue date Sep 29, 1992
- Samsung Electronics Co., Ltd.
- Ho-sun Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed floating point type multiplier circuit
- Patent number 5,144,575
- Issue date Sep 1, 1992
- Samsung Electronics Co., Ltd.
- Ho-sun Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sorting circuit using neural network
- Patent number 5,129,042
- Issue date Jul 7, 1992
- Samsung Electronics Co., Ltd.
- Ho-sun Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rank filter using neural newwork
- Patent number 5,113,484
- Issue date May 12, 1992
- Samsung Electronics Co., Ltd.
- Ho-sun Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital multiplier employing CMOS transistors
- Patent number 5,095,457
- Issue date Mar 10, 1992
- Samsung Electronics Co., Ltd.
- Ho-sun Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive associative memory comprising synapes of CMOS transistors
- Patent number 5,034,918
- Issue date Jul 23, 1991
- Samsung Electronics Co., Ltd.
- Ho-sun Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network implementation of a binary adder
- Patent number 5,016,211
- Issue date May 14, 1991
- Samsung Electronics Co., Ltd.
- Ho-sun Jeong
- G06 - COMPUTING CALCULATING COUNTING

Ho-sun Jeong

Person

Patents Grantslast 30 patents

Flash type analog-to-digital converter having MOS comparators

Pattern classifier for character recognition

MOS decoder circuit implemented using a neural network architecture

Discrete cosine transform chip using neural network concepts for ca...

Integrated circuit for square root operation using neural network

High speed floating point type multiplier circuit

Sorting circuit using neural network

Rank filter using neural newwork

Digital multiplier employing CMOS transistors

Adaptive associative memory comprising synapes of CMOS transistors

Neural network implementation of a binary adder