Hoan Huu NGUYEN

Person

Durham, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dual-mode high-bandwidth SRAM with self-timed clock circuit
- Patent number 11,270,761
- Issue date Mar 8, 2022
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth register file circuit with high port counts for redu...
- Patent number 11,031,075
- Issue date Jun 8, 2021
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual-mode high-bandwidth SRAM with self-timed clock circuit
- Patent number 10,978,139
- Issue date Apr 13, 2021
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth double-pumped memory
- Patent number 10,658,029
- Issue date May 19, 2020
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-pump memory system access circuits for sequentially executing...
- Patent number 10,622,043
- Issue date Apr 14, 2020
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read-assist circuits for memory bit cells employing a P-type field-...
- Patent number 10,424,392
- Issue date Sep 24, 2019
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wordline negative boost write-assist circuits for memory bit cells...
- Patent number 10,224,084
- Issue date Mar 5, 2019
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
P-type field-effect transistor (PFET)-based sense amplifiers for re...
- Patent number 10,163,490
- Issue date Dec 25, 2018
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-assist circuits for memory bit cells employing a P-type field-...
- Patent number 10,115,481
- Issue date Oct 30, 2018
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitline positive boost write-assist circuits for memory bit cells e...
- Patent number 10,026,456
- Issue date Jul 17, 2018
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative supply rail positive boost write-assist circuits for memor...
- Patent number 9,984,730
- Issue date May 29, 2018
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic tag compare circuits employing P-type field-effect transist...
- Patent number 9,947,406
- Issue date Apr 17, 2018
- QUALCOMM Incorporated
- Keith Alan Bowman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Leakage-aware activation control of a delayed keeper circuit for a...
- Patent number 9,940,992
- Issue date Apr 10, 2018
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline negative boost write-assist circuits for memory bit cells...
- Patent number 9,842,634
- Issue date Dec 12, 2017
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-assist circuits for memory bit cells employing a P-type field-...
- Patent number 9,741,452
- Issue date Aug 22, 2017
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Grant
Leakage current supply circuit for reducing low drop-out voltage re...
- Patent number 9,625,924
- Issue date Apr 18, 2017
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G05 - CONTROLLING REGULATING
Information Patent Grant
Dynamic tag compare circuits employing P-type field-effect transist...
- Patent number 9,627,064
- Issue date Apr 18, 2017
- QUALCOMM Incorporated
- Keith Alan Bowman
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
HYBRID COMPUTE-IN-MEMORY
- Publication number 20230078079
- Publication date Mar 16, 2023
- QUALCOMM Incorporated
- Francois Ibrahim ATALLAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL-MODE HIGH-BANDWIDTH SRAM WITH SELF-TIMED CLOCK CIRCUIT
- Publication number 20210225435
- Publication date Jul 22, 2021
- QUALCOMM Incorporated
- Hoan Huu NGUYEN
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL-MODE HIGH-BANDWIDTH SRAM WITH SELF-TIMED CLOCK CIRCUIT
- Publication number 20200388327
- Publication date Dec 10, 2020
- QUALCOMM Incorporated
- Hoan Huu NGUYEN
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH BANDWIDTH REGISTER FILE CIRCUIT
- Publication number 20200357462
- Publication date Nov 12, 2020
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH BANDWIDTH DOUBLE-PUMPED MEMORY
- Publication number 20200098422
- Publication date Mar 26, 2020
- QUALCOMM Incorporated
- Hoan Huu NGUYEN
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PUMP MEMORY SYSTEM ACCESS CIRCUITS FOR SEQUENTIALLY EXECUTING...
- Publication number 20190080737
- Publication date Mar 14, 2019
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...
- Publication number 20190057757
- Publication date Feb 21, 2019
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Application
WORDLINE NEGATIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS...
- Publication number 20180033465
- Publication date Feb 1, 2018
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Application
READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...
- Publication number 20170316838
- Publication date Nov 2, 2017
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Application
LEAKAGE-AWARE ACTIVATION CONTROL OF A DELAYED KEEPER CIRCUIT FOR A...
- Publication number 20170287550
- Publication date Oct 5, 2017
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Application
LEAKAGE CURRENT SUPPLY CIRCUIT FOR REDUCING LOW DROP-OUT VOLTAGE RE...
- Publication number 20170083031
- Publication date Mar 23, 2017
- QUALCOMM Incorporated
- Francois Ibrahim ATALLAH
- G05 - CONTROLLING REGULATING
Information Patent Application
READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...
- Publication number 20160247559
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC TAG COMPARE CIRCUITS EMPLOYING P-TYPE FIELD-EFFECT TRANSIST...
- Publication number 20160247568
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Keith Alan Bowman
- G11 - INFORMATION STORAGE
Information Patent Application
WORDLINE NEGATIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS...
- Publication number 20160247556
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Application
BITLINE POSITIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS E...
- Publication number 20160247557
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Application
NEGATIVE SUPPLY RAIL POSITIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMOR...
- Publication number 20160247558
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE

Hoan Huu NGUYEN

Person

Patents Grantslast 30 patents

Dual-mode high-bandwidth SRAM with self-timed clock circuit

High bandwidth register file circuit with high port counts for redu...

Dual-mode high-bandwidth SRAM with self-timed clock circuit

High bandwidth double-pumped memory

Multi-pump memory system access circuits for sequentially executing...

Read-assist circuits for memory bit cells employing a P-type field-...

Wordline negative boost write-assist circuits for memory bit cells...

P-type field-effect transistor (PFET)-based sense amplifiers for re...

Read-assist circuits for memory bit cells employing a P-type field-...

Bitline positive boost write-assist circuits for memory bit cells e...

Negative supply rail positive boost write-assist circuits for memor...

Dynamic tag compare circuits employing P-type field-effect transist...

Leakage-aware activation control of a delayed keeper circuit for a...

Wordline negative boost write-assist circuits for memory bit cells...

Read-assist circuits for memory bit cells employing a P-type field-...

Leakage current supply circuit for reducing low drop-out voltage re...

Dynamic tag compare circuits employing P-type field-effect transist...

Patents Applicationslast 30 patents

HYBRID COMPUTE-IN-MEMORY

DUAL-MODE HIGH-BANDWIDTH SRAM WITH SELF-TIMED CLOCK CIRCUIT

DUAL-MODE HIGH-BANDWIDTH SRAM WITH SELF-TIMED CLOCK CIRCUIT

HIGH BANDWIDTH REGISTER FILE CIRCUIT

HIGH BANDWIDTH DOUBLE-PUMPED MEMORY

MULTI-PUMP MEMORY SYSTEM ACCESS CIRCUITS FOR SEQUENTIALLY EXECUTING...

READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...

WORDLINE NEGATIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS...

READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...

LEAKAGE-AWARE ACTIVATION CONTROL OF A DELAYED KEEPER CIRCUIT FOR A...

LEAKAGE CURRENT SUPPLY CIRCUIT FOR REDUCING LOW DROP-OUT VOLTAGE RE...

READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...

DYNAMIC TAG COMPARE CIRCUITS EMPLOYING P-TYPE FIELD-EFFECT TRANSIST...

WORDLINE NEGATIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS...

BITLINE POSITIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS E...

NEGATIVE SUPPLY RAIL POSITIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMOR...