Hoichi CHEONG

Person

Atlit, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Instruction and logic to length decode X86 instructions
- Patent number 8,930,678
- Issue date Jan 6, 2015
- Intel Corporation
- Venkateswara R. Madduri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to remove stale branch predictions for an instruction prior...
- Patent number 7,783,871
- Issue date Aug 24, 2010
- Intel Corporation
- Jonathan D. Combs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache lock mechanism with speculative allocation
- Patent number 7,266,648
- Issue date Sep 4, 2007
- Intel Corporation
- Edwin R. Sutanto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for self-initiated instruction issuing and method therefor
- Patent number 7,080,241
- Issue date Jul 18, 2006
- International Business Machines Corporation
- Hung Qui Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache lock mechanism with speculative allocation
- Patent number 6,986,010
- Issue date Jan 10, 2006
- Intel Corporation
- Edwin R. Sutanto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for efficiently restoring a processor's execution...
- Patent number 6,898,696
- Issue date May 24, 2005
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for controlling access to external cache memories of differi...
- Patent number 6,604,173
- Issue date Aug 5, 2003
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for managing the execution of instruction groups...
- Patent number 6,553,480
- Issue date Apr 22, 2003
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for speculatively issuing instructions
- Patent number 6,535,973
- Issue date Mar 18, 2003
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for handling instructions occurring after an ISYN...
- Patent number 6,473,850
- Issue date Oct 29, 2002
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for dispatching groups of instructions using pipe...
- Patent number 6,324,640
- Issue date Nov 27, 2001
- International Business Machines Corporation
- Hung Qui Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for self-initiated instruction issuing and method therefor
- Patent number 6,308,260
- Issue date Oct 23, 2001
- International Business Machines Corporation
- Hung Qui Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for fast unified interrupt recovery and branch...
- Patent number 6,098,167
- Issue date Aug 1, 2000
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for memory updates within a multiprocessor data p...
- Patent number 6,073,211
- Issue date Jun 6, 2000
- International Business Machines Corporation
- Kai Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system and method for capturing history buffer data
- Patent number 6,070,235
- Issue date May 30, 2000
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for reducing the number of rename registers re...
- Patent number 6,061,777
- Issue date May 9, 2000
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concurrent execution of machine context synchronization operations...
- Patent number 5,996,085
- Issue date Nov 30, 1999
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system and method for extending the time for execut...
- Patent number 5,983,341
- Issue date Nov 9, 1999
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing the number of rename registers in...
- Patent number 5,974,524
- Issue date Oct 26, 1999
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Checkpoint table for selective instruction flushing in a speculativ...
- Patent number 5,961,636
- Issue date Oct 5, 1999
- International Business Machines Corporation
- Jeffrey Scott Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dispatching instructions in a processor supporting out-of-order exe...
- Patent number 5,913,048
- Issue date Jun 15, 1999
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Information handling system including a direct access set associati...
- Patent number 5,897,651
- Issue date Apr 27, 1999
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Issuing instructions in a processor supporting out-of-order execution
- Patent number 5,887,161
- Issue date Mar 23, 1999
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system and method for completing out-of-order instr...
- Patent number 5,875,326
- Issue date Feb 23, 1999
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for completion of non-interruptible instructio...
- Patent number 5,870,582
- Issue date Feb 9, 1999
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for condensed history buffer
- Patent number 5,870,612
- Issue date Feb 9, 1999
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for improved recovery of processor state using...
- Patent number 5,860,014
- Issue date Jan 12, 1999
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for fast parallel determination of queue entries
- Patent number 5,822,752
- Issue date Oct 13, 1998
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for writing information to registers in a data...
- Patent number 5,805,906
- Issue date Sep 8, 1998
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction dispatch unit and method for mapping a sending order of...
- Patent number 5,774,712
- Issue date Jun 30, 1998
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INSTRUCTION AND LOGIC TO LENGTH DECODE X86 INSTRUCTIONS
- Publication number 20130290678
- Publication date Oct 31, 2013
- Intel Corporation
- Venkateswara R. MADDURI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR POWER MANAGEMENT BASED ON CLASS AND CONTENT OF INSTRUCTIONS
- Publication number 20120079242
- Publication date Mar 29, 2012
- Venkateswara R. Madduri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache lock mechanism with speculative allocation
- Publication number 20060064551
- Publication date Mar 23, 2006
- Edwin R. Sutanto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism to remove stale branch predictions at a microprocessor
- Publication number 20040268102
- Publication date Dec 30, 2004
- Jonathan D. Combs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache lock mechanism with speculative allocation
- Publication number 20040117573
- Publication date Jun 17, 2004
- Edwin R. Sutanto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism for self-initiated instruction issuing and method therefor
- Publication number 20010042192
- Publication date Nov 15, 2001
- Hung Qui Le
- G06 - COMPUTING CALCULATING COUNTING

Hoichi CHEONG

Person

Patents Grantslast 30 patents

Instruction and logic to length decode X86 instructions

Method to remove stale branch predictions for an instruction prior...

Cache lock mechanism with speculative allocation

Mechanism for self-initiated instruction issuing and method therefor

Cache lock mechanism with speculative allocation

Method and system for efficiently restoring a processor's execution...

System for controlling access to external cache memories of differi...

System and method for managing the execution of instruction groups...

Method and system for speculatively issuing instructions

System and method for handling instructions occurring after an ISYN...

System and method for dispatching groups of instructions using pipe...

Mechanism for self-initiated instruction issuing and method therefor

Apparatus and method for fast unified interrupt recovery and branch...

Method and system for memory updates within a multiprocessor data p...

Data processing system and method for capturing history buffer data

Apparatus and method for reducing the number of rename registers re...

Concurrent execution of machine context synchronization operations...

Data processing system and method for extending the time for execut...

Method and apparatus for reducing the number of rename registers in...

Checkpoint table for selective instruction flushing in a speculativ...

Dispatching instructions in a processor supporting out-of-order exe...

Information handling system including a direct access set associati...

Issuing instructions in a processor supporting out-of-order execution

Data processing system and method for completing out-of-order instr...

Method and apparatus for completion of non-interruptible instructio...

Method and apparatus for condensed history buffer

Method and apparatus for improved recovery of processor state using...

Method and apparatus for fast parallel determination of queue entries

Method and apparatus for writing information to registers in a data...

Instruction dispatch unit and method for mapping a sending order of...

Patents Applicationslast 30 patents

INSTRUCTION AND LOGIC TO LENGTH DECODE X86 INSTRUCTIONS

PROCESSOR POWER MANAGEMENT BASED ON CLASS AND CONTENT OF INSTRUCTIONS

Cache lock mechanism with speculative allocation

Mechanism to remove stale branch predictions at a microprocessor

Cache lock mechanism with speculative allocation

Mechanism for self-initiated instruction issuing and method therefor