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Hong-Tsz Pan
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Cupertino, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Integrated circuit die with in-chip heat sink
Patent number
10,629,512
Issue date
Apr 21, 2020
Xilinx, Inc.
Hong-Tsz Pan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method and apparatus for suppressing metal-gate cross-diffusion in...
Patent number
9,385,127
Issue date
Jul 5, 2016
Xilinx, Inc.
Qi Lin
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Apparatus and method for reducing plasma-induced damage in pMOSFETS
Patent number
8,890,164
Issue date
Nov 18, 2014
Xilinx, Inc.
Hong-Tsz Pan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Integrated circuit structure having a capacitor structured to reduc...
Patent number
8,878,337
Issue date
Nov 4, 2014
Xilinx, Inc.
Hong-Tsz Pan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Mitigation of well proximity effect in integrated circuits
Patent number
8,350,365
Issue date
Jan 8, 2013
Xilinx, Inc.
Yun Wu
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Integrated circuit with stress inserts
Patent number
8,350,253
Issue date
Jan 8, 2013
Xilinx, Inc.
Bei Zhu
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Customizing metal pattern density in die-stacking applications
Patent number
8,296,689
Issue date
Oct 23, 2012
Xilinx, Inc.
Arifur Rahman
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Grant
System and method for detecting mask data handling errors
Patent number
8,266,553
Issue date
Sep 11, 2012
Xilinx, Inc.
Bang-Thu Nguyen
G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information
Patent Grant
Systems and methods for electrostatic discharge protection
Patent number
8,194,372
Issue date
Jun 5, 2012
Xilinx, Inc.
Nui Chong
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Embedded inductor
Patent number
8,068,004
Issue date
Nov 29, 2011
Xilinx, Inc.
Nui Chong
Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information
Patent Grant
Apparatus and method for testing of stacked die structure
Patent number
8,063,654
Issue date
Nov 22, 2011
Xilinx, Inc.
Arifur Rahman
G01 - MEASURING TESTING
Information
Patent Grant
Method of fabricating CMOS devices using fluid-based dielectric mat...
Patent number
7,737,020
Issue date
Jun 15, 2010
Xilinx, Inc.
Jonathan Jung-Ching Ho
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method and apparatus for compensating an integrated circuit layout...
Patent number
7,673,270
Issue date
Mar 2, 2010
Xilinx, Inc.
Yan Wang
G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Patents Applications
last 30 patents
Information
Patent Application
INTEGRATED CIRCUIT DIE WITH IN-CHIP HEAT SINK
Publication number
20200006186
Publication date
Jan 2, 2020
Xilinx, Inc.
Hong-Tsz Pan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
METHOD AND APPARATUS FOR SUPPRESSING METAL-GATE CROSS-DIFFUSION IN...
Publication number
20150054085
Publication date
Feb 26, 2015
Xilinx, Inc.
Qi Lin
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
APPARATUS AND METHOD FOR TESTING OF STACKED DIE STRUCTURE
Publication number
20110012633
Publication date
Jan 20, 2011
Xilinx, Inc.
Arifur Rahman
G01 - MEASURING TESTING