Hongzhou Liu

Person

Pittsburgh, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System, method, and computer program product for analog and mix-sig...
- Patent number 12,045,730
- Issue date Jul 23, 2024
- Cadence Design Systems, Inc.
- Elias Lee Fallon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for routing in an electronic design
- Patent number 11,790,147
- Issue date Oct 17, 2023
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for device mismatch contribution computation for...
- Patent number 11,562,110
- Issue date Jan 24, 2023
- Cadence Design Systems, Inc.
- Wangyang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic placement of analog design components with virtual grouping
- Patent number 11,416,660
- Issue date Aug 16, 2022
- Cadence Design Systems, Inc.
- Preeti Kapoor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sampling selection for enhanced high yield estimation in circuit de...
- Patent number 10,909,293
- Issue date Feb 2, 2021
- Cadence Design Systems, Inc.
- Wangyang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sampling selection for enhanced high yield estimation in circuit de...
- Patent number 10,853,550
- Issue date Dec 1, 2020
- Cadence Design Systems, Inc.
- Wangyang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel Monte Carlo sampling for predicting tail performance of in...
- Patent number 10,776,548
- Issue date Sep 15, 2020
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Estimation and visualization of a full probability distribution for...
- Patent number 10,528,644
- Issue date Jan 7, 2020
- Cadence Design Systems, Inc.
- Wangyang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Failure boundary classification and corner creation for scaled-sigm...
- Patent number 10,325,056
- Issue date Jun 18, 2019
- Cadence Design Systems, Inc.
- Wangyang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel extraction of worst case corners
- Patent number 10,289,764
- Issue date May 14, 2019
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Yield estimation for a post-layout circuit design
- Patent number 10,275,555
- Issue date Apr 30, 2019
- Cadence Design Systems, Inc.
- Wangyang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interactive platform to predict mismatch variation and contribution...
- Patent number 10,262,092
- Issue date Apr 16, 2019
- Cadence Design Systems, Inc.
- Wangyang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system to accelerate visualization of waveform data
- Patent number 10,114,916
- Issue date Oct 30, 2018
- Cadence Design Systems, Inc.
- Daniel da Fonseca Munford Argollo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient extraction of the worst sample in Monte Carlo simulation
- Patent number 9,836,564
- Issue date Dec 5, 2017
- Cadence Design Systems, Inc.
- Wangyang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient extraction of K-sigma corners from Monte Carlo simulation
- Patent number 9,805,158
- Issue date Oct 31, 2017
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient monte carlo flow via failure probability modeling
- Patent number 9,524,365
- Issue date Dec 20, 2016
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast monte carlo statistical analysis using threshold voltage modeling
- Patent number 8,954,908
- Issue date Feb 10, 2015
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device mismatch contribution computation with nonlinear effects
- Patent number 8,954,910
- Issue date Feb 10, 2015
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing device mismatch variation contributions
- Patent number 8,813,009
- Issue date Aug 19, 2014
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Statistical corner extraction using worst-case distance
- Patent number 8,589,852
- Issue date Nov 19, 2013
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parametric yield improvement flow incorporating sigma to target dis...
- Patent number 8,479,126
- Issue date Jul 2, 2013
- Cadence Design Systems, Inc.
- Hongzhou Liu
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Methods and systems for high sigma yield estimation
- Patent number 8,219,355
- Issue date Jul 10, 2012
- Cadence Design Systems, Inc.
- Saurabh Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for high sigma yield estimation using reduced d...
- Patent number 8,195,427
- Issue date Jun 5, 2012
- Cadence Design Systems, Inc.
- Saurabh Tiwary
- G01 - MEASURING TESTING
Information Patent Grant
Designing integrated circuits for yield
- Patent number 7,712,055
- Issue date May 4, 2010
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated sizing, layout, and extractor tool for circuit design
- Patent number 7,533,358
- Issue date May 12, 2009
- Cadence Design Systems, Inc.
- Prakash Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for improving yield of an integrated circuit
- Patent number 7,493,574
- Issue date Feb 17, 2009
- Cadence Designs Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for evaluating design costs of an integrated circuit
- Patent number 7,346,868
- Issue date Mar 18, 2008
- Cadence Design Systems, Inc.
- Rodney M. Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for quantifying tradeoffs for multiple competi...
- Patent number 6,957,400
- Issue date Oct 18, 2005
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND SYSTEMS FOR HIGH SIGMA YIELD ESTIMATION
- Publication number 20110153271
- Publication date Jun 23, 2011
- Cadence Design Systems, Inc.
- Saurabh Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND SYSTEMS FOR HIGH SIGMA YIELD ESTIMATION USING REDUCED D...
- Publication number 20110153272
- Publication date Jun 23, 2011
- Cadence Design Systems, Inc.
- Saurabh Tiwary
- G01 - MEASURING TESTING
Information Patent Application
DESIGNING INTEGRATED CIRCUITS FOR YIELD
- Publication number 20090144671
- Publication date Jun 4, 2009
- Cadence Design Systems, Inc.
- Hongzhou LIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated sizing, layout, and extractor tool for circuit design
- Publication number 20080104557
- Publication date May 1, 2008
- Cadence Design Systems, Inc.
- Prakash Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for improving yield of an integrated circuit
- Publication number 20070198956
- Publication date Aug 23, 2007
- Cadence Design Systems, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for evaluating design costs of an integrated circuit
- Publication number 20060206839
- Publication date Sep 14, 2006
- Cadence Design Systems, Inc.
- Rodney M. Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for quantifying tradeoffs for multiple competi...
- Publication number 20040243947
- Publication date Dec 2, 2004
- Neolinear, Inc.
- Hongzhou Liu
- G06 - COMPUTING CALCULATING COUNTING

Hongzhou Liu

Person

Patents Grantslast 30 patents

System, method, and computer program product for analog and mix-sig...

System and method for routing in an electronic design

System and method for device mismatch contribution computation for...

Automatic placement of analog design components with virtual grouping

Sampling selection for enhanced high yield estimation in circuit de...

Sampling selection for enhanced high yield estimation in circuit de...

Parallel Monte Carlo sampling for predicting tail performance of in...

Estimation and visualization of a full probability distribution for...

Failure boundary classification and corner creation for scaled-sigm...

Parallel extraction of worst case corners

Yield estimation for a post-layout circuit design

Interactive platform to predict mismatch variation and contribution...

Method and system to accelerate visualization of waveform data

Efficient extraction of the worst sample in Monte Carlo simulation

Efficient extraction of K-sigma corners from Monte Carlo simulation

Efficient monte carlo flow via failure probability modeling

Fast monte carlo statistical analysis using threshold voltage modeling

Device mismatch contribution computation with nonlinear effects

Computing device mismatch variation contributions

Statistical corner extraction using worst-case distance

Parametric yield improvement flow incorporating sigma to target dis...

Methods and systems for high sigma yield estimation

Methods and systems for high sigma yield estimation using reduced d...

Designing integrated circuits for yield

Integrated sizing, layout, and extractor tool for circuit design

Method and system for improving yield of an integrated circuit

Method and system for evaluating design costs of an integrated circuit

Method and apparatus for quantifying tradeoffs for multiple competi...

Patents Applicationslast 30 patents

METHODS AND SYSTEMS FOR HIGH SIGMA YIELD ESTIMATION

METHODS AND SYSTEMS FOR HIGH SIGMA YIELD ESTIMATION USING REDUCED D...

DESIGNING INTEGRATED CIRCUITS FOR YIELD

Integrated sizing, layout, and extractor tool for circuit design

Method and system for improving yield of an integrated circuit

Method and system for evaluating design costs of an integrated circuit

Method and apparatus for quantifying tradeoffs for multiple competi...