Horia Cristian Simionescu

Person

Milpitas, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Address translation based on page identifier and queue identifier
- Patent number 12,066,949
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Chung Kuang Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management
- Patent number 11,995,314
- Issue date May 28, 2024
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing trim commands in a memory sub-system
- Patent number 11,868,642
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Yueh-Hung Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interruption of program operations at a memory sub-system
- Patent number 11,803,321
- Issue date Oct 31, 2023
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Seamless recovery of a hardware-based I/O path in a multi-function...
- Patent number 11,789,819
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quality of service control of logical devices for a memory sub-system
- Patent number 11,698,876
- Issue date Jul 11, 2023
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache operations in a hybrid dual in-line memory module
- Patent number 11,561,902
- Issue date Jan 24, 2023
- Micron Technology, Inc.
- Paul Stonelake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing data dependencies for out of order processing in a hybrid...
- Patent number 11,531,622
- Issue date Dec 20, 2022
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing collisions in a non-volatile memory system with a coherenc...
- Patent number 11,513,959
- Issue date Nov 29, 2022
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing data dependencies in a transfer pipeline of a hybrid dimm
- Patent number 11,494,306
- Issue date Nov 8, 2022
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interruption of program operations at a memory sub-system
- Patent number 11,442,656
- Issue date Sep 13, 2022
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency cache for non-volatile memory in a hybrid DIMM
- Patent number 11,397,683
- Issue date Jul 26, 2022
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quality of service control of logical devices for a memory sub-system
- Patent number 11,321,257
- Issue date May 3, 2022
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache operations in a hybrid dual in-line memory module
- Patent number 11,169,920
- Issue date Nov 9, 2021
- Micron Technology, Inc.
- Paul Stonelake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing collisions in a non-volatile memory system with a coherenc...
- Patent number 10,936,496
- Issue date Mar 2, 2021
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interruption of program operations at a memory sub-system
- Patent number 10,929,056
- Issue date Feb 23, 2021
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for hardware accelerated row lock for a write bac...
- Patent number 10,649,906
- Issue date May 12, 2020
- Avago Technologies International Sales Pte. Limited
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for handling bad blocks in a hardware accelerated...
- Patent number 10,528,438
- Issue date Jan 7, 2020
- Avago Technologies International Sales Pte. Limited
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and methods for managing memory buffers
- Patent number 10,423,357
- Issue date Sep 24, 2019
- Avago Technologies International Sales Pte. Limited
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for hardware accelerated copyback
- Patent number 10,394,673
- Issue date Aug 27, 2019
- Avago Technologies International Sales Pte. Limited
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for hardware accelerated cache flush
- Patent number 10,282,116
- Issue date May 7, 2019
- Avago Technologies International Sales Pte. Limited
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for hardware accelerated read-ahead caching
- Patent number 10,282,301
- Issue date May 7, 2019
- Avago Technologies International Sales Pte. Limited
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for efficient cache buffering supporting variable...
- Patent number 10,223,009
- Issue date Mar 5, 2019
- Avago Technologies International Sales Pte. Limited
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Associative and atomic write-back caching system and method for sto...
- Patent number 10,169,232
- Issue date Jan 1, 2019
- Seagate Technology LLC
- Horia Cristian Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for efficient cache buffering in a system having...
- Patent number 10,108,359
- Issue date Oct 23, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller utilizing scatter gather list techniques
- Patent number 10,078,460
- Issue date Sep 18, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast read in write-back cached memory
- Patent number 9,965,397
- Issue date May 8, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Space efficient formats for scatter gather lists
- Patent number 9,910,797
- Issue date Mar 6, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Horia Cristian Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage controller cache memory operations that forego region locking
- Patent number 9,910,798
- Issue date Mar 6, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Horia Cristian Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Peripheral component interconnect express controllers configured wi...
- Patent number 9,841,902
- Issue date Dec 12, 2017
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Anant Baderdinni
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ADDRESS TRANSLATION
- Publication number 20240411701
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Chung Kuang Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MANAGEMENT
- Publication number 20240302958
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROPORTIONAL PERFORMANCE METRIC CONTROL FOR PHYSICAL FUNCTIONS OF A...
- Publication number 20240202030
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Horia C. SIMIONESCU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE ACTIVE COMMAND TRACKING
- Publication number 20240192891
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUALITY OF SERVICE MANAGEMENT IN A MEMORY SUB-SYSTEM
- Publication number 20240160553
- Publication date May 16, 2024
- Micron Technology, Inc.
- Raja V.S. Halaharivi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING TRIM COMMANDS IN A MEMORY SUB-SYSTEM
- Publication number 20240103752
- Publication date Mar 28, 2024
- Micron Technology, Inc.
- Yueh-Hung Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEAMLESS RECOVERY OF A HARDWARE-BASED I/O PATH IN A MULTI-FUNCTION...
- Publication number 20230350754
- Publication date Nov 2, 2023
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MANAGEMENT
- Publication number 20230176731
- Publication date Jun 8, 2023
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING THERMAL THROTTLING IN A MEMORY SUB-SYSTEM
- Publication number 20230131347
- Publication date Apr 27, 2023
- Micron Technology, Inc.
- Huapeng G. Guan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING TRIM COMMANDS IN A MEMORY SUB-SYSTEM
- Publication number 20230065337
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Yueh-Hung Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERRUPTION OF PROGRAM OPERATIONS AT A MEMORY SUB-SYSTEM
- Publication number 20230014869
- Publication date Jan 19, 2023
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUALITY OF SERVICE CONTROL OF LOGICAL DEVICES FOR A MEMORY SUB-SYSTEM
- Publication number 20220237133
- Publication date Jul 28, 2022
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE OPERATIONS IN A HYBRID DUAL IN-LINE MEMORY MODULE
- Publication number 20220027271
- Publication date Jan 27, 2022
- Micron Technology, Inc.
- Paul Stonelake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUALITY OF SERVICE CONTROL OF LOGICAL DEVICES FOR A MEMORY SUB-SYSTEM
- Publication number 20210200703
- Publication date Jul 1, 2021
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION COHERENCY IN A NON-VOLATILE MEMORY SYSTEM
- Publication number 20210182199
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Horia C. SIMIONESCU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERRUPTION OF PROGRAM OPERATIONS AT A MEMORY SUB-SYSTEM
- Publication number 20210173585
- Publication date Jun 10, 2021
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING DATA DEPENDENCIES FOR OUT OF ORDER PROCESSING IN A HYBRID...
- Publication number 20210089450
- Publication date Mar 25, 2021
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY CACHE FOR NON-VOLATILE MEMORY IN A HYBRID DIMM
- Publication number 20210089454
- Publication date Mar 25, 2021
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING DATA DEPENDENCIES IN A TRANSFER PIPELINE OF A HYBRID DIMM
- Publication number 20210089449
- Publication date Mar 25, 2021
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION COHERENCY IN A NON-VOLATILE MEMORY SYSTEM
- Publication number 20200387449
- Publication date Dec 10, 2020
- Micron Technology, Inc.
- Horia C. SIMIONESCU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERRUPTION OF PROGRAM OPERATIONS AT A MEMORY SUB-SYSTEM
- Publication number 20200210098
- Publication date Jul 2, 2020
- Micron Technology, Inc.
- Horia C. Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE OPERATIONS IN A HYBRID DUAL IN-LINE MEMORY MODULE
- Publication number 20200089610
- Publication date Mar 19, 2020
- Micron Technology, Inc.
- Paul STONELAKE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR INPUT/OUTPUT PROCESSING FOR WRITE THROUGH TO...
- Publication number 20200057576
- Publication date Feb 20, 2020
- Avago Technologies General IP (Singapore) PTE. LTD.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR HARDWARE ACCELERATED ROW LOCK FOR A WRITE BAC...
- Publication number 20190332541
- Publication date Oct 31, 2019
- Avago Technologies General IP (Singapore) PTE. LTD.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR HARDWARE ACCELERATED CACHE FLUSH
- Publication number 20190026033
- Publication date Jan 24, 2019
- Avago Technologies General IP (Singapore) PTE. LTD.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR HANDLING BAD BLOCKS IN A HARDWARE ACCELERATED...
- Publication number 20180341564
- Publication date Nov 29, 2018
- Avago Technologies General IP (Singapore) PTE. LTD.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICES AND METHODS FOR MANAGING MEMORY BUFFERS
- Publication number 20180335974
- Publication date Nov 22, 2018
- Avago Technologies General IP (Singapore) PTE. LTD.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR HARDWARE ACCELERATED READ-AHEAD CACHING
- Publication number 20180336138
- Publication date Nov 22, 2018
- Avago Technologies General IP (Singapore) PTE. LTD.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR HARDWARE ACCELERATED COPYBACK
- Publication number 20180335963
- Publication date Nov 22, 2018
- Avago Technologies General IP (Singapore) PTE. LTD.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR EFFICIENT HASHING OPTIMIZED FOR HARDWARE ACCE...
- Publication number 20180113810
- Publication date Apr 26, 2018
- Avago Technologies General IP (Singapore) PTE. LTD.
- Horia Simionescu
- G06 - COMPUTING CALCULATING COUNTING

Horia Cristian Simionescu

Person

Patents Grantslast 30 patents

Address translation based on page identifier and queue identifier

Memory management

Managing trim commands in a memory sub-system

Interruption of program operations at a memory sub-system

Seamless recovery of a hardware-based I/O path in a multi-function...

Quality of service control of logical devices for a memory sub-system

Cache operations in a hybrid dual in-line memory module

Managing data dependencies for out of order processing in a hybrid...

Managing collisions in a non-volatile memory system with a coherenc...

Managing data dependencies in a transfer pipeline of a hybrid dimm

Interruption of program operations at a memory sub-system

Low latency cache for non-volatile memory in a hybrid DIMM

Quality of service control of logical devices for a memory sub-system

Cache operations in a hybrid dual in-line memory module

Managing collisions in a non-volatile memory system with a coherenc...

Interruption of program operations at a memory sub-system

Method and system for hardware accelerated row lock for a write bac...

Method and system for handling bad blocks in a hardware accelerated...

Devices and methods for managing memory buffers

Method and system for hardware accelerated copyback

Method and system for hardware accelerated cache flush

Method and system for hardware accelerated read-ahead caching

Method and system for efficient cache buffering supporting variable...

Associative and atomic write-back caching system and method for sto...

Method and system for efficient cache buffering in a system having...

Memory controller utilizing scatter gather list techniques

Fast read in write-back cached memory

Space efficient formats for scatter gather lists

Storage controller cache memory operations that forego region locking

Peripheral component interconnect express controllers configured wi...

Patents Applicationslast 30 patents

ADDRESS TRANSLATION

MEMORY MANAGEMENT

PROPORTIONAL PERFORMANCE METRIC CONTROL FOR PHYSICAL FUNCTIONS OF A...

MEMORY DEVICE ACTIVE COMMAND TRACKING

QUALITY OF SERVICE MANAGEMENT IN A MEMORY SUB-SYSTEM

MANAGING TRIM COMMANDS IN A MEMORY SUB-SYSTEM

SEAMLESS RECOVERY OF A HARDWARE-BASED I/O PATH IN A MULTI-FUNCTION...

MEMORY MANAGEMENT

MANAGING THERMAL THROTTLING IN A MEMORY SUB-SYSTEM

MANAGING TRIM COMMANDS IN A MEMORY SUB-SYSTEM

INTERRUPTION OF PROGRAM OPERATIONS AT A MEMORY SUB-SYSTEM

QUALITY OF SERVICE CONTROL OF LOGICAL DEVICES FOR A MEMORY SUB-SYSTEM

CACHE OPERATIONS IN A HYBRID DUAL IN-LINE MEMORY MODULE

QUALITY OF SERVICE CONTROL OF LOGICAL DEVICES FOR A MEMORY SUB-SYSTEM

OPERATION COHERENCY IN A NON-VOLATILE MEMORY SYSTEM

INTERRUPTION OF PROGRAM OPERATIONS AT A MEMORY SUB-SYSTEM

MANAGING DATA DEPENDENCIES FOR OUT OF ORDER PROCESSING IN A HYBRID...

LOW LATENCY CACHE FOR NON-VOLATILE MEMORY IN A HYBRID DIMM

MANAGING DATA DEPENDENCIES IN A TRANSFER PIPELINE OF A HYBRID DIMM

OPERATION COHERENCY IN A NON-VOLATILE MEMORY SYSTEM

INTERRUPTION OF PROGRAM OPERATIONS AT A MEMORY SUB-SYSTEM

CACHE OPERATIONS IN A HYBRID DUAL IN-LINE MEMORY MODULE

METHOD AND SYSTEM FOR INPUT/OUTPUT PROCESSING FOR WRITE THROUGH TO...

METHOD AND SYSTEM FOR HARDWARE ACCELERATED ROW LOCK FOR A WRITE BAC...

METHOD AND SYSTEM FOR HARDWARE ACCELERATED CACHE FLUSH

METHOD AND SYSTEM FOR HANDLING BAD BLOCKS IN A HARDWARE ACCELERATED...

DEVICES AND METHODS FOR MANAGING MEMORY BUFFERS

METHOD AND SYSTEM FOR HARDWARE ACCELERATED READ-AHEAD CACHING

METHOD AND SYSTEM FOR HARDWARE ACCELERATED COPYBACK

METHOD AND SYSTEM FOR EFFICIENT HASHING OPTIMIZED FOR HARDWARE ACCE...