Horng-Sen Fu

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of making semiconductor having improved interlevel conductor...
- Patent number 5,393,690
- Issue date Feb 28, 1995
- Texas Instruments Incorporated
- Horng-Sen Fu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor having improved interlevel conductor insulation
- Patent number 5,202,574
- Issue date Apr 13, 1993
- Texas Instruments Incorporated
- Horng-Sen Fu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate method for making MESFET semiconductor
- Patent number 4,553,316
- Issue date Nov 19, 1985
- Texas Instruments Incorporated
- Theodore W. Houston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for improving reflow of phosphosilicate glass by arsenic imp...
- Patent number 4,535,528
- Issue date Aug 20, 1985
- Hewlett-Packard Company
- Devereaux C. Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate method for making MESFET semiconductor
- Patent number 4,455,738
- Issue date Jun 26, 1984
- Texas Instruments Incorporated
- Theodore W. Houston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High performance submicron metal-oxide-semiconductor field effect t...
- Patent number 4,384,301
- Issue date May 17, 1983
- Texas Instruments Incorporated
- Al F. Tasch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Submicron patterning without using submicron lithographic technique
- Patent number 4,358,340
- Issue date Nov 9, 1982
- Texas Instruments Incorporated
- Horng-Sen Fu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Coating device with As.sub.2 -O.sub.3 -SiO.sub.2
- Patent number 4,355,454
- Issue date Oct 26, 1982
- Texas Instruments Incorporated
- Al F. Tasch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having improved interlevel conductor insulation
- Patent number 4,356,040
- Issue date Oct 26, 1982
- Texas Instruments Incorporated
- Horng-Sen Fu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multilevel interconnect system for high density silicon gate field...
- Patent number 4,319,260
- Issue date Mar 9, 1982
- Texas Instruments Incorporated
- Al F. Tasch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming self-registering source, drain, and gate contacts...
- Patent number 4,305,200
- Issue date Dec 15, 1981
- Hewlett-Packard Company
- Horng-Sen Fu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried storage punch through dynamic ram cell
- Patent number 4,203,125
- Issue date May 13, 1980
- Texas Instruments Incorporated
- Pallab K. Chatterjee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having a high breakdown voltage junction chara...
- Patent number 4,153,904
- Issue date May 8, 1979
- Texas Instruments Incorporated
- Al F. Tasch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS ram cell having improved refresh time
- Patent number 4,152,779
- Issue date May 1, 1979
- Texas Instruments Incorporated
- Al F. Tasch
- G11 - INFORMATION STORAGE
Information Patent Grant
Fabrication methods for the high capacity ram cell
- Patent number 4,112,575
- Issue date Sep 12, 1978
- Texas Instruments Incorporated
- Horng-sen Fu
- G11 - INFORMATION STORAGE
Information Patent Grant
Charge coupled device random access memory
- Patent number 4,060,738
- Issue date Nov 29, 1977
- Texas Instruments Incorporated
- Al F. Tasch
- G11 - INFORMATION STORAGE
Information Patent Grant
Uniphase charge coupled devices
- Patent number 4,047,215
- Issue date Sep 6, 1977
- Texas Instruments Incorporated
- Robert Charles Frye
- H01 - BASIC ELECTRIC ELEMENTS

Horng-Sen Fu

Person

Patents Grantslast 30 patents

Method of making semiconductor having improved interlevel conductor...

Semiconductor having improved interlevel conductor insulation

Self-aligned gate method for making MESFET semiconductor

Method for improving reflow of phosphosilicate glass by arsenic imp...

Self-aligned gate method for making MESFET semiconductor

High performance submicron metal-oxide-semiconductor field effect t...

Submicron patterning without using submicron lithographic technique

Coating device with As.sub.2 -O.sub.3 -SiO.sub.2

Semiconductor device having improved interlevel conductor insulation

Multilevel interconnect system for high density silicon gate field...

Method of forming self-registering source, drain, and gate contacts...

Buried storage punch through dynamic ram cell

Semiconductor device having a high breakdown voltage junction chara...

MOS ram cell having improved refresh time

Fabrication methods for the high capacity ram cell

Charge coupled device random access memory

Uniphase charge coupled devices