Houssam Jomaa

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Substrate with embedded stacked through-silicon via die
- Patent number 11,107,766
- Issue date Aug 31, 2021
- Intel Corporation
- Javier Soto Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density embedded interconnects in substrate
- Patent number 10,804,195
- Issue date Oct 13, 2020
- QUALCOMM Incorporated
- Kuiwon Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low profile integrated package
- Patent number 10,651,160
- Issue date May 12, 2020
- QUALCOMM Incorporated
- Kuiwon Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density interconnects in an embedded trace substrate (ETS) com...
- Patent number 10,622,292
- Issue date Apr 14, 2020
- QUALCOMM Incorporated
- Kuiwon Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate with embedded stacked through-silicon via die
- Patent number 10,461,032
- Issue date Oct 29, 2019
- Intel Corporation
- Javier Soto Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit (IC) package and package substrate comprising st...
- Patent number 10,157,824
- Issue date Dec 18, 2018
- QUALCOMM Incorporated
- Kuiwon Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit and process for fabricating thereof
- Patent number 9,941,158
- Issue date Apr 10, 2018
- Intel Corporation
- Charan Gurumurthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mechanical adhesion of copper metallization to dielectric with part...
- Patent number 9,929,097
- Issue date Mar 27, 2018
- Intel Corporation
- Ravi Nalla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate and method of forming the same
- Patent number 9,679,841
- Issue date Jun 13, 2017
- QUALCOMM Incorporated
- Houssam Wafic Jomaa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package substrate comprising surface interconnect and cavity compri...
- Patent number 9,609,751
- Issue date Mar 28, 2017
- QUALCOMM Incorporated
- Houssam Wafic Jomaa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip package having a substrate with a plurality of verticall...
- Patent number 9,559,088
- Issue date Jan 31, 2017
- Intel Corporation
- Javier Soto Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power management integrated circuit (PMIC) integration into a proce...
- Patent number 9,536,805
- Issue date Jan 3, 2017
- QUALCOMM Incorporated
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems, apparatus, and methods for heat dissipation
- Patent number 9,460,980
- Issue date Oct 4, 2016
- QUALCOMM Incorporated
- Sun Yun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual epoxy dielectric and photosensitive solder mask coatings, and...
- Patent number 9,398,699
- Issue date Jul 19, 2016
- Intel Corporation
- Houssam Jomaa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Package on package (PoP) integrated device comprising a plurality o...
- Patent number 9,355,898
- Issue date May 31, 2016
- QUALCOMM Incorporated
- Rajneesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface finish on trace for a thermal compression flip chip (TCFC)
- Patent number 9,269,681
- Issue date Feb 23, 2016
- QUALCOMM Incorporated
- Houssam W. Jomaa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mechanical adhesion of copper metallization to dielectric with part...
- Patent number 9,040,842
- Issue date May 26, 2015
- Intel Corporation
- Ravi Nalla
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Barrier layer on bump and non-wettable coating on trace
- Patent number 8,802,556
- Issue date Aug 12, 2014
- QUALCOMM Incorporated
- Omar J. Bchir
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-chip package having a substrate with a plurality of verticall...
- Patent number 8,736,065
- Issue date May 27, 2014
- Intel Corporation
- Javier Soto Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing coreless substrate
- Patent number 8,555,494
- Issue date Oct 15, 2013
- Intel Corporation
- Houssam Jomaa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Substrate with embedded stacked through-silicon via die
- Patent number 8,421,245
- Issue date Apr 16, 2013
- Intel Corporation
- Javier Soto Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual epoxy dielectric and photosensitive solder mask coatings, and...
- Patent number 8,276,269
- Issue date Oct 2, 2012
- Intel Corporation
- Houssam Jomaa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Alternative to desmear for build-up roughening and copper adhesion...
- Patent number 8,268,724
- Issue date Sep 18, 2012
- Intel Corporation
- Houssam Jomaa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for the fabrication of microelectronic device substrates by...
- Patent number 8,067,266
- Issue date Nov 29, 2011
- Intel Corporation
- Houssam Jomaa
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Selective electroless plating for electronic substrates
- Patent number 8,017,022
- Issue date Sep 13, 2011
- Intel Corporation
- Houssam Jomaa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit and process for fabricating thereof
- Patent number 7,998,857
- Issue date Aug 16, 2011
- Intel Corporation
- Charan Gurumurthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of enabling selective area plating on a substrate
- Patent number 7,923,059
- Issue date Apr 12, 2011
- Intel Corporation
- Omar J. Bchir
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method of manufacturing a substrate for a microelectronic device, a...
- Patent number 7,909,977
- Issue date Mar 22, 2011
- Intel Corporation
- Houssam Jomaa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Optical die structures and associated package substrates
- Patent number 7,831,115
- Issue date Nov 9, 2010
- Intel Corporation
- Omar Bchir
- G02 - OPTICS
Information Patent Grant
Alternative to desmear for build-up roughening and copper adhesion...
- Patent number 7,638,877
- Issue date Dec 29, 2009
- Intel Corporation
- Houssam Jomaa
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
LAYERED GLASS ASSEMBLY WITH PRE-PATTERNED ELECTRICALLY CONDUCTIVE I...
- Publication number 20240112999
- Publication date Apr 4, 2024
- Intel Corporation
- Jieying Kong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH DENSITY EMBEDDED INTERCONNECTS IN SUBSTRATE
- Publication number 20200051907
- Publication date Feb 13, 2020
- QUALCOMM Incorporated
- Kuiwon KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE WITH EMBEDDED STACKED THROUGH-SILICON VIA DIE
- Publication number 20200020636
- Publication date Jan 16, 2020
- Intel Corporation
- Javier Soto GONZALEZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH DENSITY INTERCONNECTS IN AN EMBEDDED TRACE SUBSTRATE (ETS) COM...
- Publication number 20200013706
- Publication date Jan 9, 2020
- QUALCOMM Incorporated
- Kuiwon KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINE PITCH AND SPACING INTERCONNECTS WITH RESERVE INTERCONNECT PORTION
- Publication number 20190067178
- Publication date Feb 28, 2019
- QUALCOMM Incorporated
- Kuiwon Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT (IC) PACKAGE AND PACKAGE SUBSTRATE COMPRISING ST...
- Publication number 20180323137
- Publication date Nov 8, 2018
- QUALCOMM Incorporated
- Kuiwon KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW PROFILE INTEGRATED PACKAGE
- Publication number 20180269186
- Publication date Sep 20, 2018
- QUALCOMM Incorporated
- Kuiwon KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS, APPARATUS, AND METHODS FOR HEAT DISSIPATION
- Publication number 20160240455
- Publication date Aug 18, 2016
- QUALCOMM Incorporated
- Sun YUN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MECHANICAL ADHESION OF COPPER METALLIZATION TO DIELECTRIC WITH PART...
- Publication number 20160079174
- Publication date Mar 17, 2016
- Ravi Nalla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE ON PACKAGE (PoP) INTEGRATED DEVICE COMPRISING A PLURALITY O...
- Publication number 20160035622
- Publication date Feb 4, 2016
- QUALCOMM Incorporated
- Rajneesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE AND METHOD OF FORMING THE SAME
- Publication number 20150333004
- Publication date Nov 19, 2015
- QUALCOMM Incorporated
- Houssam Wafic JOMAA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE SUBSTRATE COMPRISING SURFACE INTERCONNECT AND CAVITY COMPRI...
- Publication number 20150296616
- Publication date Oct 15, 2015
- QUALCOMM Incorporated
- Houssam Wafic Jomaa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
BARRIER LAYER ON BUMP AND NON-WETTABLE COATING ON TRACE
- Publication number 20140322868
- Publication date Oct 30, 2014
- Omar James Bchir
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-CHIP PACKAGE HAVING A SUBSTRATE WITH A PLURALITY OF VERTICALL...
- Publication number 20140248742
- Publication date Sep 4, 2014
- Javier Soto Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANCHORING A TRACE ON A SUBSTRATE TO REDUCE PEELING OF THE TRACE
- Publication number 20140175658
- Publication date Jun 26, 2014
- QUALCOMM Incorporated
- Chin-Kwan Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE HAVING THERMAL COMPRESSION FLIP CHIP (TCFC) AND CHIP WITH R...
- Publication number 20140159238
- Publication date Jun 12, 2014
- QUALCOMM Incorporated
- Manuel Aldrete
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SURFACE FINISH ON TRACE FOR A THERMAL COMPRESSION FLIP CHIP (TCFC)
- Publication number 20140138831
- Publication date May 22, 2014
- QUALCOMM Incorporated
- Houssam W. Jomaa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BARRIER LAYER ON BUMP AND NON-WETTABLE COATING ON TRACE
- Publication number 20140131857
- Publication date May 15, 2014
- QUALCOMM Incorporated
- Omar J. Bchir
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MECHANICAL ADHESION OF COPPER METALLIZATION TO DIELECTRIC WITH PART...
- Publication number 20130299226
- Publication date Nov 14, 2013
- Ravi Nalla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE WITH EMBEDDED STACKED THROUGH-SILICON VIA DIE
- Publication number 20130147043
- Publication date Jun 13, 2013
- Javier Soto Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL EPOXY DIELECTRIC AND PHOTOSENSITIVE SOLDER MASK COATINGS, AND...
- Publication number 20120318565
- Publication date Dec 20, 2012
- Houssam Jomaa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-CHIP PACKAGE HAVING A SUBSTRATE WITH A PLURALITY OF VERTICALL...
- Publication number 20120161331
- Publication date Jun 28, 2012
- Javier Soto Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE WITH EMBEDDED STACKED THROUGH-SILICON VIA DIE
- Publication number 20120161316
- Publication date Jun 28, 2012
- Javier Soto Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT AND PROCESS FOR FABRICATING THEREOF
- Publication number 20110298135
- Publication date Dec 8, 2011
- Charan Gurumurthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Microelectronic device substrate fabrication
- Publication number 20110147439
- Publication date Jun 23, 2011
- Houssam Jomaa
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD OF MANUFACTURING A SUBSTRATE FOR A MICROELECTRONIC DEVICE, A...
- Publication number 20110135883
- Publication date Jun 9, 2011
- Houssam Jomaa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD OF ENABLING SELECTIVE AREA PLATING ON A SUBSTRATE
- Publication number 20110123725
- Publication date May 26, 2011
- Omar J. Bchir
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Application
ALTERNATIVE TO DESMEAR FOR BUILD-UP ROUGHENING AND COPPER ADHESION...
- Publication number 20100059891
- Publication date Mar 11, 2010
- Houssam Jomaa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual epoxy dielectric and photosensitive solder mask coatings, and...
- Publication number 20090314538
- Publication date Dec 24, 2009
- Houssam Jomaa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD OF MANUFACTURING A SUBSTRATE FOR A MICROELECTRONIC DEVICE, A...
- Publication number 20090246462
- Publication date Oct 1, 2009
- Houssam Jomaa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Houssam Jomaa

Person

Patents Grantslast 30 patents

Substrate with embedded stacked through-silicon via die

High density embedded interconnects in substrate

Low profile integrated package

High density interconnects in an embedded trace substrate (ETS) com...

Substrate with embedded stacked through-silicon via die

Integrated circuit (IC) package and package substrate comprising st...

Integrated circuit and process for fabricating thereof

Mechanical adhesion of copper metallization to dielectric with part...

Substrate and method of forming the same

Package substrate comprising surface interconnect and cavity compri...

Multi-chip package having a substrate with a plurality of verticall...

Power management integrated circuit (PMIC) integration into a proce...

Systems, apparatus, and methods for heat dissipation

Dual epoxy dielectric and photosensitive solder mask coatings, and...

Package on package (PoP) integrated device comprising a plurality o...

Surface finish on trace for a thermal compression flip chip (TCFC)

Mechanical adhesion of copper metallization to dielectric with part...

Barrier layer on bump and non-wettable coating on trace

Multi-chip package having a substrate with a plurality of verticall...

Method of manufacturing coreless substrate

Substrate with embedded stacked through-silicon via die

Dual epoxy dielectric and photosensitive solder mask coatings, and...

Alternative to desmear for build-up roughening and copper adhesion...

Methods for the fabrication of microelectronic device substrates by...

Selective electroless plating for electronic substrates

Integrated circuit and process for fabricating thereof

Method of enabling selective area plating on a substrate

Method of manufacturing a substrate for a microelectronic device, a...

Optical die structures and associated package substrates

Alternative to desmear for build-up roughening and copper adhesion...

Patents Applicationslast 30 patents

LAYERED GLASS ASSEMBLY WITH PRE-PATTERNED ELECTRICALLY CONDUCTIVE I...

HIGH DENSITY EMBEDDED INTERCONNECTS IN SUBSTRATE

SUBSTRATE WITH EMBEDDED STACKED THROUGH-SILICON VIA DIE

HIGH DENSITY INTERCONNECTS IN AN EMBEDDED TRACE SUBSTRATE (ETS) COM...

FINE PITCH AND SPACING INTERCONNECTS WITH RESERVE INTERCONNECT PORTION

INTEGRATED CIRCUIT (IC) PACKAGE AND PACKAGE SUBSTRATE COMPRISING ST...

LOW PROFILE INTEGRATED PACKAGE

SYSTEMS, APPARATUS, AND METHODS FOR HEAT DISSIPATION

MECHANICAL ADHESION OF COPPER METALLIZATION TO DIELECTRIC WITH PART...

PACKAGE ON PACKAGE (PoP) INTEGRATED DEVICE COMPRISING A PLURALITY O...

SUBSTRATE AND METHOD OF FORMING THE SAME

PACKAGE SUBSTRATE COMPRISING SURFACE INTERCONNECT AND CAVITY COMPRI...

BARRIER LAYER ON BUMP AND NON-WETTABLE COATING ON TRACE

MULTI-CHIP PACKAGE HAVING A SUBSTRATE WITH A PLURALITY OF VERTICALL...

ANCHORING A TRACE ON A SUBSTRATE TO REDUCE PEELING OF THE TRACE

PACKAGE HAVING THERMAL COMPRESSION FLIP CHIP (TCFC) AND CHIP WITH R...

SURFACE FINISH ON TRACE FOR A THERMAL COMPRESSION FLIP CHIP (TCFC)

BARRIER LAYER ON BUMP AND NON-WETTABLE COATING ON TRACE

MECHANICAL ADHESION OF COPPER METALLIZATION TO DIELECTRIC WITH PART...

SUBSTRATE WITH EMBEDDED STACKED THROUGH-SILICON VIA DIE

DUAL EPOXY DIELECTRIC AND PHOTOSENSITIVE SOLDER MASK COATINGS, AND...

MULTI-CHIP PACKAGE HAVING A SUBSTRATE WITH A PLURALITY OF VERTICALL...

SUBSTRATE WITH EMBEDDED STACKED THROUGH-SILICON VIA DIE

INTEGRATED CIRCUIT AND PROCESS FOR FABRICATING THEREOF

Microelectronic device substrate fabrication

METHOD OF MANUFACTURING A SUBSTRATE FOR A MICROELECTRONIC DEVICE, A...

METHOD OF ENABLING SELECTIVE AREA PLATING ON A SUBSTRATE

ALTERNATIVE TO DESMEAR FOR BUILD-UP ROUGHENING AND COPPER ADHESION...

Dual epoxy dielectric and photosensitive solder mask coatings, and...

METHOD OF MANUFACTURING A SUBSTRATE FOR A MICROELECTRONIC DEVICE, A...