HSIA-WEI CHEN

Person

TAIPEI CITY, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Memory device with bottom electrode
- Patent number 12,336,442
- Issue date Jun 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
Information Patent Grant
Threshold voltage-modulated memory device using variable-capacitanc...
- Patent number 12,310,036
- Issue date May 20, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Fa-Shen Jiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Threshold voltage-modulated memory device using variable-capacitanc...
- Patent number 12,232,336
- Issue date Feb 18, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Fa-Shen Jiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit device
- Patent number 12,218,005
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Threshold voltage-modulated memory device using variable-capacitanc...
- Patent number 12,075,636
- Issue date Aug 27, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Fa-Shen Jiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method to form memory cells separated by a void-free dielectric str...
- Patent number 11,980,041
- Issue date May 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
Information Patent Grant
Circuit design and layout with high embedded memory density
- Patent number 11,961,545
- Issue date Apr 16, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Fa-Shen Jiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for fabricating integrated circuit device
- Patent number 11,894,267
- Issue date Feb 6, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect landing method for RRAM technology
- Patent number 11,889,705
- Issue date Jan 30, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Threshold voltage-modulated memory device using variable-capacitanc...
- Patent number 11,856,801
- Issue date Dec 26, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Fa-Shen Jiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive switching random access memory with asymmetric source and...
- Patent number 11,856,797
- Issue date Dec 26, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-Chieh Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flat bottom electrode via (BEVA) top surface for memory
- Patent number 11,844,286
- Issue date Dec 12, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cells separated by a void-free dielectric structure
- Patent number 11,839,090
- Issue date Dec 5, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
Information Patent Grant
Flat bottom electrode via (BEVA) top surface for memory
- Patent number 11,751,485
- Issue date Sep 5, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
RRAM cell structure with laterally offset BEVA/TEVA
- Patent number 11,723,292
- Issue date Aug 8, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Yang Chang
Information Patent Grant
Memory device and method for fabricating the same
- Patent number 11,723,294
- Issue date Aug 8, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Hsia-Wei Chen
Information Patent Grant
Circuit design and layout with high embedded memory density
- Patent number 11,545,202
- Issue date Jan 3, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Fa-Shen Jiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Logic compatible RRAM structure and process
- Patent number 11,387,411
- Issue date Jul 12, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Yang Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a homogeneous bottom electrode via (BEVA) top su...
- Patent number 11,315,861
- Issue date Apr 26, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive switching random access memory with asymmetric source and...
- Patent number 11,239,279
- Issue date Feb 1, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chin-Chieh Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a flat bottom electrode via (BEVA) top surface f...
- Patent number 11,201,281
- Issue date Dec 14, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect landing method for RRAM technology
- Patent number 11,094,744
- Issue date Aug 17, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form memory cells separated by a void-free dielectric str...
- Patent number 11,037,989
- Issue date Jun 15, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form memory cells separated by a void-free dielectric str...
- Patent number 11,037,990
- Issue date Jun 15, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing semiconductor device
- Patent number 10,910,260
- Issue date Feb 2, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Wei-Chieh Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect landing method for RRAM technology
- Patent number 10,903,274
- Issue date Jan 26, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Resistance variable memory structure and method of forming the same
- Patent number 10,868,250
- Issue date Dec 15, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Kuo-Chi Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Top electrode for device structures in interconnect
- Patent number 10,862,029
- Issue date Dec 8, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for reading RRAM cell
- Patent number 10,796,759
- Issue date Oct 6, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chin-Chieh Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for forming a flat bottom electrode via (BEVA) top surface f...
- Patent number 10,763,426
- Issue date Sep 1, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MEMORY STRUCTURE
- Publication number 20250228147
- Publication date Jul 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Fu-Ting Sung
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE
- Publication number 20250140608
- Publication date May 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsia-Wei CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RESISTIVE MEMORY CELL TOP ELECTRODE CONTACT WITH REDUCED CORNER ERO...
- Publication number 20250133969
- Publication date Apr 24, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Jhih-Bin Chen
Information Patent Application
THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANC...
- Publication number 20240357840
- Publication date Oct 24, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Fa-Shen JIANG
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT DESIGN AND LAYOUT WITH HIGH EMBEDDED MEMORY DENSITY
- Publication number 20240203472
- Publication date Jun 20, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Fa-Shen Jiang
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT DEVICE
- Publication number 20240162088
- Publication date May 16, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsia-Wei CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RESISTIVE MEMORY DEVICE INCLUDING A SILICON OXIDE BASE SPACER AND M...
- Publication number 20240114810
- Publication date Apr 4, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Fu-Ting Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANC...
- Publication number 20240074217
- Publication date Feb 29, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Fa-Shen JIANG
- G11 - INFORMATION STORAGE
Information Patent Application
RRAM WITH POST-PATTERNED TREATED MEMORY FILMS TO PROVIDE IMPROVED E...
- Publication number 20230371407
- Publication date Nov 16, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Watson Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANC...
- Publication number 20230371288
- Publication date Nov 16, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Fa-Shen JIANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH BOTTOM ELECTRODE
- Publication number 20230329128
- Publication date Oct 12, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hsia-Wei CHEN
Information Patent Application
RESISTIVE MEMORY DEVICE WITH ULTRA-THIN BARRIER LAYER AND METHODS O...
- Publication number 20230284540
- Publication date Sep 7, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT DESIGN AND LAYOUT WITH HIGH EMBEDDED MEMORY DENSITY
- Publication number 20230100181
- Publication date Mar 30, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Fa-Shen Jiang
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT DESIGN AND LAYOUT WITH HIGH EMBEDDED MEMORY DENSITY
- Publication number 20220351766
- Publication date Nov 3, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Fa-Shen Jiang
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD TO FORM MEMORY CELLS SEPARATED BY A VOID-FREE DIELECTRIC STR...
- Publication number 20220293681
- Publication date Sep 15, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING INTEGRATED CIRCUIT DEVICE
- Publication number 20220216106
- Publication date Jul 7, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsia-Wei CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Resistive Switching Random Access Memory with Asymmetric Source and...
- Publication number 20220157889
- Publication date May 19, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-Chieh YANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A FLAT BOTTOM ELECTRODE VIA (BEVA) TOP SURFACE F...
- Publication number 20220093849
- Publication date Mar 24, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A FLAT BOTTOM ELECTRODE VIA (BEVA) TOP SURFACE F...
- Publication number 20220085280
- Publication date Mar 17, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
- Publication number 20210408373
- Publication date Dec 30, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hsia-Wei CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANC...
- Publication number 20210391329
- Publication date Dec 16, 2021
- Taiwan Semiconductor Manufacturing Company Limited
- Fa-Shen JIANG
- G11 - INFORMATION STORAGE
Information Patent Application
INTERCONNECT LANDING METHOD FOR RRAM TECHNOLOGY
- Publication number 20210366988
- Publication date Nov 25, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO FORM MEMORY CELLS SEPARATED BY A VOID-FREE DIELECTRIC STR...
- Publication number 20210296401
- Publication date Sep 23, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Logic Compatible RRAM Structure and Process
- Publication number 20200381622
- Publication date Dec 3, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Yang Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A FLAT BOTTOM ELECTRODE VIA (BEVA) TOP SURFACE F...
- Publication number 20200357981
- Publication date Nov 12, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RRAM CELL STRUCTURE WITH LATERALLY OFFSET BEVA/TEVA
- Publication number 20200335694
- Publication date Oct 22, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Chih-Yang Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO FORM MEMORY CELLS SEPARATED BY A VOID-FREE DIELECTRIC STR...
- Publication number 20200295085
- Publication date Sep 17, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO FORM MEMORY CELLS SEPARATED BY A VOID-FREE DIELECTRIC STR...
- Publication number 20200295084
- Publication date Sep 17, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Hsia-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A HOMOGENEOUS BOTTOM ELECTRODE VIA (BEVA) TOP SU...
- Publication number 20200144172
- Publication date May 7, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Hsia-Wei Chen
- G11 - INFORMATION STORAGE
Information Patent Application
BARRIER LAYER FOR RESISTIVE RANDOM ACCESS MEMORY
- Publication number 20200136039
- Publication date Apr 30, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tzu Chung TSAI
- H01 - BASIC ELECTRIC ELEMENTS

HSIA-WEI CHEN

Person

Patents Grantslast 30 patents

Memory device with bottom electrode

Threshold voltage-modulated memory device using variable-capacitanc...

Threshold voltage-modulated memory device using variable-capacitanc...

Integrated circuit device

Threshold voltage-modulated memory device using variable-capacitanc...

Method to form memory cells separated by a void-free dielectric str...

Circuit design and layout with high embedded memory density

Method for fabricating integrated circuit device

Interconnect landing method for RRAM technology

Threshold voltage-modulated memory device using variable-capacitanc...

Resistive switching random access memory with asymmetric source and...

Flat bottom electrode via (BEVA) top surface for memory

Memory cells separated by a void-free dielectric structure

Flat bottom electrode via (BEVA) top surface for memory

RRAM cell structure with laterally offset BEVA/TEVA

Memory device and method for fabricating the same

Circuit design and layout with high embedded memory density

Logic compatible RRAM structure and process

Method for forming a homogeneous bottom electrode via (BEVA) top su...

Resistive switching random access memory with asymmetric source and...

Method for forming a flat bottom electrode via (BEVA) top surface f...

Interconnect landing method for RRAM technology

Method to form memory cells separated by a void-free dielectric str...

Method to form memory cells separated by a void-free dielectric str...

Method for manufacturing semiconductor device

Interconnect landing method for RRAM technology

Resistance variable memory structure and method of forming the same

Top electrode for device structures in interconnect

Method and apparatus for reading RRAM cell

Method for forming a flat bottom electrode via (BEVA) top surface f...

Patents Applicationslast 30 patents

MEMORY STRUCTURE

INTEGRATED CIRCUIT STRUCTURE

RESISTIVE MEMORY CELL TOP ELECTRODE CONTACT WITH REDUCED CORNER ERO...

THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANC...

CIRCUIT DESIGN AND LAYOUT WITH HIGH EMBEDDED MEMORY DENSITY

INTEGRATED CIRCUIT DEVICE

RESISTIVE MEMORY DEVICE INCLUDING A SILICON OXIDE BASE SPACER AND M...

THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANC...

RRAM WITH POST-PATTERNED TREATED MEMORY FILMS TO PROVIDE IMPROVED E...

THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANC...

MEMORY DEVICE WITH BOTTOM ELECTRODE

RESISTIVE MEMORY DEVICE WITH ULTRA-THIN BARRIER LAYER AND METHODS O...

CIRCUIT DESIGN AND LAYOUT WITH HIGH EMBEDDED MEMORY DENSITY

CIRCUIT DESIGN AND LAYOUT WITH HIGH EMBEDDED MEMORY DENSITY

METHOD TO FORM MEMORY CELLS SEPARATED BY A VOID-FREE DIELECTRIC STR...

METHOD FOR FABRICATING INTEGRATED CIRCUIT DEVICE

Resistive Switching Random Access Memory with Asymmetric Source and...

METHOD FOR FORMING A FLAT BOTTOM ELECTRODE VIA (BEVA) TOP SURFACE F...

METHOD FOR FORMING A FLAT BOTTOM ELECTRODE VIA (BEVA) TOP SURFACE F...

MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME

THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANC...

INTERCONNECT LANDING METHOD FOR RRAM TECHNOLOGY

METHOD TO FORM MEMORY CELLS SEPARATED BY A VOID-FREE DIELECTRIC STR...

Logic Compatible RRAM Structure and Process

METHOD FOR FORMING A FLAT BOTTOM ELECTRODE VIA (BEVA) TOP SURFACE F...

RRAM CELL STRUCTURE WITH LATERALLY OFFSET BEVA/TEVA

METHOD TO FORM MEMORY CELLS SEPARATED BY A VOID-FREE DIELECTRIC STR...

METHOD TO FORM MEMORY CELLS SEPARATED BY A VOID-FREE DIELECTRIC STR...

METHOD FOR FORMING A HOMOGENEOUS BOTTOM ELECTRODE VIA (BEVA) TOP SU...

BARRIER LAYER FOR RESISTIVE RANDOM ACCESS MEMORY