Hsian-Feng Liu

Person

Hsinchu Hsien, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Delay locked loop and associated control method
- Patent number 9,553,593
- Issue date Jan 24, 2017
- MStar Semiconductor, Inc.
- Meng-Tse Weng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data transmission method and associated signal transmitter
- Patent number 9,191,182
- Issue date Nov 17, 2015
- MStar Semiconductor, Inc.
- Hsian-Feng Liu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Output apparatus, output driver, and level shifting system
- Patent number 9,143,133
- Issue date Sep 22, 2015
- MStar Semiconductor, Inc.
- Hsian-Feng Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Driving circuit and driving method
- Patent number 9,118,318
- Issue date Aug 25, 2015
- MStar Semiconductor, Inc.
- Hsian-Feng Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Control method and controller for DRAM
- Patent number 8,782,332
- Issue date Jul 15, 2014
- MSTAR Semiconductor, Inc.
- Chung-Ching Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in self-test circuit applied to high speed I/O port
- Patent number 8,773,932
- Issue date Jul 8, 2014
- MStar Semiconductor, Inc.
- Yu-Lin Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method of generating universal memory I/O
- Patent number 8,635,569
- Issue date Jan 21, 2014
- MStar Semiconductor, Inc.
- Sterling Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low voltage transmitter with high output voltage
- Patent number 8,581,628
- Issue date Nov 12, 2013
- MStar Semiconductor, Inc.
- Chun-Wen Yeh
- G08 - SIGNALLING
Information Patent Grant
Memory controller and associated control method
- Patent number 8,412,883
- Issue date Apr 2, 2013
- MStar Semiconductor, Inc.
- Yo-Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase generating apparatus and method thereof
- Patent number 8,339,175
- Issue date Dec 25, 2012
- MStar Semiconductor, Inc.
- Hsian-Feng Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Universal IO unit, associated apparatus and method
- Patent number 8,237,470
- Issue date Aug 7, 2012
- MStar Semiconductor, Inc.
- Hsian-Feng Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and device for equalizing mode selection
- Patent number 7,447,511
- Issue date Nov 4, 2008
- Mstar Semiconductor, Inc.
- Ke-Chiang Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
DELAY LOCKED LOOP AND ASSOCIATED CONTROL METHOD
- Publication number 20170041009
- Publication date Feb 9, 2017
- Mstar Semiconductor, Inc.
- Meng-Tse Weng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA TRANSMISSION METHOD AND ASSOCIATED SIGNAL TRANSMITTER
- Publication number 20150195080
- Publication date Jul 9, 2015
- Mstar Semiconductor, Inc.
- Hsian-Feng Liu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DRIVING CIRCUIT AND DRIVING METHOD
- Publication number 20150194958
- Publication date Jul 9, 2015
- Mstar Semiconductor, Inc.
- Hsian-Feng Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
OUTPUT APPARATUS, OUTPUT DRIVER, AND LEVEL SHIFTING SYSTEM
- Publication number 20150061746
- Publication date Mar 5, 2015
- Mstar Semiconductor, Inc.
- Hsian-Feng Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Driving Circuit and Driving Method
- Publication number 20140035554
- Publication date Feb 6, 2014
- Hsian-Feng Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BUILT-IN SELF-TEST CIRCUIT APPLIED TO HIGH SPEED I/O PORT
- Publication number 20130194876
- Publication date Aug 1, 2013
- Mstar Semiconductor, Inc.
- Yu-Lin Chen
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROL METHOD AND CONTROLLER FOR DRAM
- Publication number 20120226852
- Publication date Sep 6, 2012
- MSTAR SEMICONDUCTOR, INC.
- CHUNG-CHING CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low Voltage Transmitter with High Output Voltage
- Publication number 20120057262
- Publication date Mar 8, 2012
- Mstar Semiconductor, Inc.
- Chun-Wen Yeh
- G08 - SIGNALLING
Information Patent Application
Multi-Mode Output Transmitter
- Publication number 20120025894
- Publication date Feb 2, 2012
- Mstar Semiconductor, Inc.
- Shih Jyun Yang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Memory Controller and Associated Control Method
- Publication number 20110153963
- Publication date Jun 23, 2011
- Mstar Semiconductor, Inc.
- Yo-Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Universal IO Unit, Associated Apparatus and Method
- Publication number 20110128042
- Publication date Jun 2, 2011
- Mstar Semiconductor, Inc.
- Hsian-Feng Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and Method of Generating Universal Memory I/O
- Publication number 20110131354
- Publication date Jun 2, 2011
- Mstar Semiconductor, Inc.
- Sterling Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Phase Generating Apparatus and Method Thereof
- Publication number 20110128061
- Publication date Jun 2, 2011
- Mstar Semiconductor, Inc.
- Hsian-Feng Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and device for equalizing mode selection
- Publication number 20050270076
- Publication date Dec 8, 2005
- Mstar Semiconductor, Inc.
- Ke-Chiang Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Hsian-Feng Liu

Person

Patents Grantslast 30 patents

Delay locked loop and associated control method

Data transmission method and associated signal transmitter

Output apparatus, output driver, and level shifting system

Driving circuit and driving method

Control method and controller for DRAM

Built-in self-test circuit applied to high speed I/O port

Apparatus and method of generating universal memory I/O

Low voltage transmitter with high output voltage

Memory controller and associated control method

Phase generating apparatus and method thereof

Universal IO unit, associated apparatus and method

Method and device for equalizing mode selection

Patents Applicationslast 30 patents

DELAY LOCKED LOOP AND ASSOCIATED CONTROL METHOD

DATA TRANSMISSION METHOD AND ASSOCIATED SIGNAL TRANSMITTER

DRIVING CIRCUIT AND DRIVING METHOD

OUTPUT APPARATUS, OUTPUT DRIVER, AND LEVEL SHIFTING SYSTEM

Driving Circuit and Driving Method

BUILT-IN SELF-TEST CIRCUIT APPLIED TO HIGH SPEED I/O PORT

CONTROL METHOD AND CONTROLLER FOR DRAM

Low Voltage Transmitter with High Output Voltage

Multi-Mode Output Transmitter

Memory Controller and Associated Control Method

Universal IO Unit, Associated Apparatus and Method

Apparatus and Method of Generating Universal Memory I/O

Phase Generating Apparatus and Method Thereof

Method and device for equalizing mode selection