Hsiao Han Thio

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Etch stop layer for memory cell reliability improvement
- Patent number 8,658,496
- Issue date Feb 25, 2014
- Advanced Mirco Devices, Inc.
- Hiroyuki Kinoshita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Void free interlayer dielectric
- Patent number 8,614,475
- Issue date Dec 24, 2013
- Spansion LLC
- Minh Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Junction leakage suppression in memory devices
- Patent number 8,536,011
- Issue date Sep 17, 2013
- Spansion LLC
- Shibly S. Ahmed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Void free interlayer dielectric
- Patent number 8,367,493
- Issue date Feb 5, 2013
- Spansion LLC
- Minh Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etch stop layer for memory cell reliability improvement
- Patent number 8,319,266
- Issue date Nov 27, 2012
- Advanced Micro Devices, Inc.
- Hiroyuki Kinoshita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Junction leakage suppression in memory devices
- Patent number 7,939,440
- Issue date May 10, 2011
- Spansion LLC
- Shibly S. Ahmed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for testing tunnel oxide on a memory-related stru...
- Patent number 6,808,945
- Issue date Oct 26, 2004
- Advanced Micro Devices, Inc.
- Zhigang Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Using a first liner layer as a spacer in a semiconductor device
- Patent number 6,716,710
- Issue date Apr 6, 2004
- Advanced Micro Devices, Inc.
- Hsiao-Han Thio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of protecting a stacked gate structure during fabrication
- Patent number 6,696,331
- Issue date Feb 24, 2004
- Advanced Micro Devices, Inc.
- Nian Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Replacing a first liner layer with a thicker oxide layer when formi...
- Patent number 6,689,666
- Issue date Feb 10, 2004
- Advanced Micro Devices, Inc.
- Hsiao-Han Thio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating devices in core and periphery semiconductor...
- Patent number 6,670,227
- Issue date Dec 30, 2003
- Advanced Micro Devices, Inc.
- Hsiao-Han Thio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dummy gate process to reduce the Vss resistance of flash products
- Patent number 6,461,905
- Issue date Oct 8, 2002
- Advanced Micro Devices, Inc.
- Zhigang Wang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
VOID FREE INTERLAYER DIELECTRIC
- Publication number 20130140720
- Publication date Jun 6, 2013
- Advanced Micro Devices, Inc.
- Minh Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ETCH STOP LAYER FOR MEMORY CELL RELIABILITY IMPROVEMENT
- Publication number 20130078795
- Publication date Mar 28, 2013
- SPANSION LLC
- Hiroyuki KINOSHITA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
JUNCTION LEAKAGE SUPPRESSION IN MEMORY DEVICES
- Publication number 20110176363
- Publication date Jul 21, 2011
- SPANSION LLC
- Shibly S. AHMED
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Junction leakage suppression in memory devices
- Publication number 20070052002
- Publication date Mar 8, 2007
- Shibly S. Ahmed
- H01 - BASIC ELECTRIC ELEMENTS

Hsiao Han Thio

Person

Patents Grantslast 30 patents

Etch stop layer for memory cell reliability improvement

Void free interlayer dielectric

Junction leakage suppression in memory devices

Void free interlayer dielectric

Etch stop layer for memory cell reliability improvement

Junction leakage suppression in memory devices

Method and system for testing tunnel oxide on a memory-related stru...

Using a first liner layer as a spacer in a semiconductor device

Method of protecting a stacked gate structure during fabrication

Replacing a first liner layer with a thicker oxide layer when formi...

Method for fabricating devices in core and periphery semiconductor...

Dummy gate process to reduce the Vss resistance of flash products

Patents Applicationslast 30 patents

VOID FREE INTERLAYER DIELECTRIC

ETCH STOP LAYER FOR MEMORY CELL RELIABILITY IMPROVEMENT

JUNCTION LEAKAGE SUPPRESSION IN MEMORY DEVICES

Junction leakage suppression in memory devices