Hsiao Jung LIN

Person

  • Taichung, TW

Patents Grantslast 30 patents

  • Information Patent Grant

    Printed circuit board with stacked passive components

    • Patent number 12,022,618
    • Issue date Jun 25, 2024
    • Western Digital Technologies, Inc.
    • Chien Te Chen
    • H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • Information Patent Grant

    Bumped pad structure

    • Patent number 11,557,555
    • Issue date Jan 17, 2023
    • Western Digital Technologies, Inc.
    • Hsiao Jung Lin
    • H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

  • Information Patent Application

    PRINTED CIRCUIT BOARD WITH STACKED PASSIVE COMPONENTS

    • Publication number 20220346234
    • Publication date Oct 27, 2022
    • Western Digital Technologies, Inc.
    • Chien Te Chen
    • H01 - BASIC ELECTRIC ELEMENTS
  • Information Patent Application

    BUMPED PAD STRUCTURE

    • Publication number 20210391286
    • Publication date Dec 16, 2021
    • Western Digital Technologies, Inc.
    • Hsiao Jung LIN
    • H01 - BASIC ELECTRIC ELEMENTS