Hsiao-Lei Wang

Person

Taichun, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Low parasitic capacitance bit line process for stack DRAM
- Patent number 8,012,810
- Issue date Sep 6, 2011
- Inotera Memories, Inc.
- Hsiao-Lei Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Aggressive capacitor array cell layout for narrow diameter DRAM tre...
- Patent number 6,703,273
- Issue date Mar 9, 2004
- Promos Technologies, Inc.
- Hsiao-Lei Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing deep trench capacitor
- Patent number 6,680,237
- Issue date Jan 20, 2004
- ProMos Technologies Inc.
- Shih-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce lot-to-lot variation of array threshold voltage in...
- Patent number 6,633,793
- Issue date Oct 14, 2003
- ProMos Technologies
- Joseph Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a trench capacitor
- Patent number 6,444,524
- Issue date Sep 3, 2002
- ProMos Technologies, Inc.
- Jesse Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making deep trench capacitors for DRAMs with reduced fac...
- Patent number 6,391,706
- Issue date May 21, 2002
- Promos Technologies, Inc.
- Chao-Chueh Wu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PREPARING METHOD OF CATALYST FOR FUEL CELL AND PREPARING METHOD OF...
- Publication number 20150086727
- Publication date Mar 26, 2015
- National Taiwan University of Science and Technology
- Chen-Hao Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW PARASITIC CAPACITANCE BIT LINE PROCESS FOR STACK DRAM
- Publication number 20110111573
- Publication date May 12, 2011
- INOTERA MEMORIES, INC.
- HSIAO-LEI WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAM STRUCTURE WITH A LOW PARASITIC CAPACITANCE AND METHOD OF MAKIN...
- Publication number 20110084325
- Publication date Apr 14, 2011
- Hsiao-Lei Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE-SIDE IMPLANTING PROCESS FOR CAPACITORS OF STACK DRAM
- Publication number 20110086490
- Publication date Apr 14, 2011
- INOTERA MEMORIES, INC.
- HSIAO-LEI WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Aggressive capacitor array cell layout for narrow diameter DRAM tre...
- Publication number 20030134468
- Publication date Jul 17, 2003
- ProMOS Technologies, Inc.
- Hsiao-Lei Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of buried strap out-diffusion formation by gas phase doping
- Publication number 20030064598
- Publication date Apr 3, 2003
- ProMOS Technologies, Inc.
- Jesse Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming a bottle-shaped trench
- Publication number 20030045119
- Publication date Mar 6, 2003
- Hsiao-Lei Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to reduce lot-to-lot variation of array threshold voltage in...
- Publication number 20030033043
- Publication date Feb 13, 2003
- ProMOS Technologies
- Joseph Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of manufacturing deep trench capacitor
- Publication number 20030017675
- Publication date Jan 23, 2003
- Shih-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for making deep trench capacitors for DRAMs with reduced fac...
- Publication number 20020016035
- Publication date Feb 7, 2002
- ProMOS Technologies, Inc.
- Chao-Chueh Wu
- H01 - BASIC ELECTRIC ELEMENTS

Hsiao-Lei Wang

Person

Patents Grantslast 30 patents

Low parasitic capacitance bit line process for stack DRAM

Aggressive capacitor array cell layout for narrow diameter DRAM tre...

Method of manufacturing deep trench capacitor

Method to reduce lot-to-lot variation of array threshold voltage in...

Method for forming a trench capacitor

Method for making deep trench capacitors for DRAMs with reduced fac...

Patents Applicationslast 30 patents

PREPARING METHOD OF CATALYST FOR FUEL CELL AND PREPARING METHOD OF...

LOW PARASITIC CAPACITANCE BIT LINE PROCESS FOR STACK DRAM

DRAM STRUCTURE WITH A LOW PARASITIC CAPACITANCE AND METHOD OF MAKIN...

SINGLE-SIDE IMPLANTING PROCESS FOR CAPACITORS OF STACK DRAM

Aggressive capacitor array cell layout for narrow diameter DRAM tre...

Method of buried strap out-diffusion formation by gas phase doping

Method for forming a bottle-shaped trench

Method to reduce lot-to-lot variation of array threshold voltage in...

Method of manufacturing deep trench capacitor

Method for making deep trench capacitors for DRAMs with reduced fac...