Hsien-Ching Lo

Person

Clifton Park, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Single diffusion break device for FDSOI
- Patent number 10,957,578
- Issue date Mar 23, 2021
- GLOBALFOUNDRIES U.S. INC.
- Wei Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etch stop layer for use in forming contacts that extend to multiple...
- Patent number 10,714,577
- Issue date Jul 14, 2020
- GLOBALFOUNDRIES Inc.
- Wei Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET device with a wrap-around silicide source/drain contact stru...
- Patent number 10,700,173
- Issue date Jun 30, 2020
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin-type transistors with spacers on the gates
- Patent number 10,636,894
- Issue date Apr 28, 2020
- GLOBALFOUNDRIES Inc.
- Yanping Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wrap-all-around contact for nanosheet-FET and method of forming same
- Patent number 10,559,656
- Issue date Feb 11, 2020
- GLOBALFOUNDRIES Inc.
- Emilie M. S. Bourjot
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFETs having gates parallel to fins
- Patent number 10,553,707
- Issue date Feb 4, 2020
- GLOBALFOUNDRIES Inc.
- Yanping Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field-effect transistors with improved dielectric gap fill
- Patent number 10,546,775
- Issue date Jan 28, 2020
- GLOBALFOUNDRIES Inc.
- Wei Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Epitaxial region for embedded source/drain region having uniform th...
- Patent number 10,461,155
- Issue date Oct 29, 2019
- GLOBALFOUNDRIES Inc.
- Yoong Hooi Yong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple-layer spacers for field-effect transistors
- Patent number 10,431,665
- Issue date Oct 1, 2019
- GLOBALFOUNDRIES Inc.
- Tao Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple gate length device with self-aligned top junction
- Patent number 10,410,929
- Issue date Sep 10, 2019
- GLOBALFOUNDRIES Inc.
- Hui Zang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Intergrated circuit structure including single diffusion break abut...
- Patent number 10,388,652
- Issue date Aug 20, 2019
- GLOBALFOUNDRIES Inc.
- Yongiun Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single-curvature cavity for semiconductor epitaxy
- Patent number 10,355,104
- Issue date Jul 16, 2019
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual-curvature cavity for epitaxial semiconductor growth
- Patent number 10,297,675
- Issue date May 21, 2019
- GLOBALFOUNDRIES Inc.
- Alina Vinslava
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a vertical field effect transistor (VFET) and a V...
- Patent number 10,276,689
- Issue date Apr 30, 2019
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Boundary spacer structure and integration
- Patent number 10,262,903
- Issue date Apr 16, 2019
- GLOBALFOUNDRIES Inc.
- Judson R. Holt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming vertical field effect transistors with different...
- Patent number 10,249,538
- Issue date Apr 2, 2019
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical-transport field-effect transistors with an etched-through...
- Patent number 10,211,317
- Issue date Feb 19, 2019
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric spacer for preventing epitaxial merge between adjacent d...
- Patent number 10,163,635
- Issue date Dec 25, 2018
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Finfet diffusion break having protective liner in fin insulator
- Patent number 10,164,010
- Issue date Dec 25, 2018
- GLOBALFOUNDRIES Inc.
- Wei Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming epi semiconductor material on a thinned fin in t...
- Patent number 10,121,868
- Issue date Nov 6, 2018
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit structure incorporating non-planar field effect...
- Patent number 10,068,902
- Issue date Sep 4, 2018
- GLOBALFOUNDRIES Inc.
- Yanping Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple Fin heights with dielectric isolation
- Patent number 10,068,810
- Issue date Sep 4, 2018
- GLOBALFOUNDRIES Inc.
- Xusheng Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical-transport field-effect transistors with an etched-through...
- Patent number 10,050,125
- Issue date Aug 14, 2018
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple-layer spacers for field-effect transistors
- Patent number 9,947,769
- Issue date Apr 17, 2018
- GLOBALFOUNDRIES Inc.
- Tao Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming EPI semiconductor material on the source/drain r...
- Patent number 9,887,094
- Issue date Feb 6, 2018
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer spacer used in finFET
- Patent number 9,419,101
- Issue date Aug 16, 2016
- GLOBALFOUNDRIES Inc.
- Jianwei Peng
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ETCH STOP LAYER FOR USE IN FORMING CONTACTS THAT EXTEND TO MULTIPLE...
- Publication number 20200105886
- Publication date Apr 2, 2020
- GLOBALFOUNDRIES INC.
- Wei Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE DIFFUSION BREAK DEVICE FOR FDSOI
- Publication number 20200105584
- Publication date Apr 2, 2020
- GLOBALFOUNDRIES INC.
- Wei HONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFETS HAVING GATES PARALLEL TO FINS
- Publication number 20200066883
- Publication date Feb 27, 2020
- GLOBALFOUNDRIES INC.
- Yanping Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIELD-EFFECT TRANSISTORS WITH IMPROVED DIELECTRIC GAP FILL
- Publication number 20200043779
- Publication date Feb 6, 2020
- GLOBALFOUNDRIES INC.
- Wei Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPOSITE SPACERS FOR TAILORING THE SHAPE OF THE SOURCE AND DRAIN R...
- Publication number 20200020770
- Publication date Jan 16, 2020
- GLOBALFOUNDRIES INC.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WRAP-ALL-AROUND CONTACT FOR NANOSHEET-FET AND METHOD OF FORMING SAME
- Publication number 20190341448
- Publication date Nov 7, 2019
- GLOBALFOUNDRIES INC.
- Emilie M.S. Bourjot
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET DEVICE WITH A WRAP-AROUND SILICIDE SOURCE/DRAIN CONTACT STRU...
- Publication number 20190312117
- Publication date Oct 10, 2019
- GLOBALFOUNDRIES INC.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIN-TYPE TRANSISTORS WITH SPACERS ON THE GATES
- Publication number 20190280105
- Publication date Sep 12, 2019
- GLOBALFOUNDRIES INC.
- Yanping Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE GATE LENGTH DEVICE WITH SELF-ALIGNED TOP JUNCTION
- Publication number 20190206743
- Publication date Jul 4, 2019
- GLOBALFOUNDRIES INC.
- Hui ZANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL-CURVATURE CAVITY FOR EPITAXIAL SEMICONDUCTOR GROWTH
- Publication number 20190181243
- Publication date Jun 13, 2019
- GLOBALFOUNDRIES INC.
- Alina Vinslava
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE INCLUDING SINGLE DIFFUSION BREAK ABUTT...
- Publication number 20190148373
- Publication date May 16, 2019
- GLOBALFOUNDRIES INC.
- Yongiun Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPITAXIAL REGION FOR EMBEDDED SOURCE/DRAIN REGION HAVING UNIFORM TH...
- Publication number 20190148492
- Publication date May 16, 2019
- GLOBALFOUNDRIES INC.
- Yoong Hooi Yong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE-CURVATURE CAVITY FOR SEMICONDUCTOR EPITAXY
- Publication number 20190131432
- Publication date May 2, 2019
- GLOBALFOUNDRIES INC.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL-CURVATURE CAVITY FOR EPITAXIAL SEMICONDUCTOR GROWTH
- Publication number 20190131433
- Publication date May 2, 2019
- GLOBALFOUNDRIES INC.
- Alina Vinslava
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING VERTICAL FIELD EFFECT TRANSISTORS WITH DIFFERENT...
- Publication number 20190103319
- Publication date Apr 4, 2019
- GLOBALFOUNDRIES INC.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL-TRANSPORT FIELD-EFFECT TRANSISTORS WITH AN ETCHED-THROUGH...
- Publication number 20190051735
- Publication date Feb 14, 2019
- GLOBALFOUNDRIES INC.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOUNDARY SPACER STRUCTURE AND INTEGRATION
- Publication number 20180374759
- Publication date Dec 27, 2018
- GLOBALFOUNDRIES INC.
- Judson R. HOLT
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A VERTICAL FIELD EFFECT TRANSISTOR (VFET) AND A V...
- Publication number 20180358452
- Publication date Dec 13, 2018
- GLOBALFOUNDRIES INC.
- YI QI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING EPI SEMICONDUCTOR MATERIAL ON A THINNED FIN IN T...
- Publication number 20180323269
- Publication date Nov 8, 2018
- GLOBALFOUNDRIES INC.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING SEMICONDUCTOR STRUCTURE AND RESULTING STRUCTURE
- Publication number 20180190792
- Publication date Jul 5, 2018
- GLOBALFOUNDRIES INC.
- Jianwei Peng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE-LAYER SPACERS FOR FIELD-EFFECT TRANSISTORS
- Publication number 20180151690
- Publication date May 31, 2018
- GLOBALFOUNDRIES INC.
- Tao Han
- H01 - BASIC ELECTRIC ELEMENTS

Hsien-Ching Lo

Person

Patents Grantslast 30 patents

Single diffusion break device for FDSOI

Etch stop layer for use in forming contacts that extend to multiple...

FinFET device with a wrap-around silicide source/drain contact stru...

Fin-type transistors with spacers on the gates

Wrap-all-around contact for nanosheet-FET and method of forming same

FinFETs having gates parallel to fins

Field-effect transistors with improved dielectric gap fill

Epitaxial region for embedded source/drain region having uniform th...

Multiple-layer spacers for field-effect transistors

Multiple gate length device with self-aligned top junction

Intergrated circuit structure including single diffusion break abut...

Single-curvature cavity for semiconductor epitaxy

Dual-curvature cavity for epitaxial semiconductor growth

Method of forming a vertical field effect transistor (VFET) and a V...

Boundary spacer structure and integration

Method of forming vertical field effect transistors with different...

Vertical-transport field-effect transistors with an etched-through...

Asymmetric spacer for preventing epitaxial merge between adjacent d...

Finfet diffusion break having protective liner in fin insulator

Methods of forming epi semiconductor material on a thinned fin in t...

Integrated circuit structure incorporating non-planar field effect...

Multiple Fin heights with dielectric isolation

Vertical-transport field-effect transistors with an etched-through...

Multiple-layer spacers for field-effect transistors

Methods of forming EPI semiconductor material on the source/drain r...

Multi-layer spacer used in finFET

Patents Applicationslast 30 patents

ETCH STOP LAYER FOR USE IN FORMING CONTACTS THAT EXTEND TO MULTIPLE...

SINGLE DIFFUSION BREAK DEVICE FOR FDSOI

FINFETS HAVING GATES PARALLEL TO FINS

FIELD-EFFECT TRANSISTORS WITH IMPROVED DIELECTRIC GAP FILL

COMPOSITE SPACERS FOR TAILORING THE SHAPE OF THE SOURCE AND DRAIN R...

WRAP-ALL-AROUND CONTACT FOR NANOSHEET-FET AND METHOD OF FORMING SAME

FINFET DEVICE WITH A WRAP-AROUND SILICIDE SOURCE/DRAIN CONTACT STRU...

FIN-TYPE TRANSISTORS WITH SPACERS ON THE GATES

MULTIPLE GATE LENGTH DEVICE WITH SELF-ALIGNED TOP JUNCTION

DUAL-CURVATURE CAVITY FOR EPITAXIAL SEMICONDUCTOR GROWTH

INTEGRATED CIRCUIT STRUCTURE INCLUDING SINGLE DIFFUSION BREAK ABUTT...

EPITAXIAL REGION FOR EMBEDDED SOURCE/DRAIN REGION HAVING UNIFORM TH...

SINGLE-CURVATURE CAVITY FOR SEMICONDUCTOR EPITAXY

DUAL-CURVATURE CAVITY FOR EPITAXIAL SEMICONDUCTOR GROWTH

METHOD OF FORMING VERTICAL FIELD EFFECT TRANSISTORS WITH DIFFERENT...

VERTICAL-TRANSPORT FIELD-EFFECT TRANSISTORS WITH AN ETCHED-THROUGH...

BOUNDARY SPACER STRUCTURE AND INTEGRATION

METHOD OF FORMING A VERTICAL FIELD EFFECT TRANSISTOR (VFET) AND A V...

METHODS OF FORMING EPI SEMICONDUCTOR MATERIAL ON A THINNED FIN IN T...

METHOD OF FORMING SEMICONDUCTOR STRUCTURE AND RESULTING STRUCTURE

MULTIPLE-LAYER SPACERS FOR FIELD-EFFECT TRANSISTORS