Hsien-Hsin Sean LEE

Person

Duluth, GA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit and method of manufacturing the same
- Patent number 12,236,180
- Issue date Feb 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Jung Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit and cache circuit configuration
- Patent number 12,093,176
- Issue date Sep 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsien-Hsin Sean Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit and method of manufacturing the same
- Patent number 11,775,724
- Issue date Oct 3, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Jung Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit and cache circuit configuration
- Patent number 11,687,454
- Issue date Jun 27, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Hsin Sean Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-patterning graph reduction and checking flow method
- Patent number 11,681,850
- Issue date Jun 20, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Nien-Yu Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit and cache circuit configuration
- Patent number 11,216,376
- Issue date Jan 4, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsien-Hsin Sean Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit and system of manufacturing the same
- Patent number 11,138,361
- Issue date Oct 5, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Jung Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Standard cell and semiconductor device including anchor nodes and m...
- Patent number 11,106,852
- Issue date Aug 31, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Nien-Yu Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit and method for manufacturing same
- Patent number 11,062,075
- Issue date Jul 13, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Jung Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-patterning graph reduction and checking flow method
- Patent number 11,017,148
- Issue date May 25, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Nien-Yu Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of determining colorability of a semiconductor device and sy...
- Patent number 10,878,167
- Issue date Dec 29, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chung-Yun Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Standard cell and semiconductor device including anchor nodes
- Patent number 10,713,407
- Issue date Jul 14, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Nien-Yu Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of determining colorability of a semiconductor device and sy...
- Patent number 10,515,185
- Issue date Dec 24, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chung-Yun Cheng
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for layout generation with constrained hypergraph partitioning
- Patent number 10,509,883
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd
- Tsun-Yu Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit and method for manufacturing the same
- Patent number 10,489,548
- Issue date Nov 26, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Jung Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-patterning graph reduction and checking flow method
- Patent number 10,430,544
- Issue date Oct 1, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Nien-Yu Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit and cache circuit configuration
- Patent number 10,430,334
- Issue date Oct 1, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Hsin Sean Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of determining colorability of a semiconductor device and sy...
- Patent number 10,204,205
- Issue date Feb 12, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chung-Yun Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of designing a semiconductor device, system for implementing...
- Patent number 10,162,928
- Issue date Dec 25, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Nien-Yu Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, device and computer program product for integrated circuit...
- Patent number 10,140,407
- Issue date Nov 27, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chia-Ming Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of generating modified layout and system therefor
- Patent number 10,019,548
- Issue date Jul 10, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chia-Ming Ho
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Mask design based on sensitivities to changes in pattern spacing
- Patent number 9,846,761
- Issue date Dec 19, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Cheng Chou
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of generating modified layout for RC extraction
- Patent number 9,710,588
- Issue date Jul 18, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Ming Ho
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Multi-layer semiconductor structures for fabricating inverter chains
- Patent number 9,666,490
- Issue date May 30, 2017
- Taiwan Semiconductor Manufacturing Company Limited
- I-Fan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Common template for electronic article
- Patent number 9,613,174
- Issue date Apr 4, 2017
- Taiwan Semiconductor Manufacturing Company Limited
- William Wu Shen
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
System and method for creating hybrid resistance and capacitance (R...
- Patent number 9,582,630
- Issue date Feb 28, 2017
- Taiwan Semiconductor Manufacturing Company Limited
- Ze-Ming Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for capacitance extraction
- Patent number 9,471,738
- Issue date Oct 18, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Cheng Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mask shift resistance-inductance method for multiple patterning mas...
- Patent number 9,448,467
- Issue date Sep 20, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Cheng Chou
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Memory circuit and cache circuit configuration
- Patent number 9,431,064
- Issue date Aug 30, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsien-Hsin Sean Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-layer semiconductor structures for fabricating inverter chains
- Patent number 9,373,623
- Issue date Jun 21, 2016
- Taiwan Semiconductor Manufacturing Company Limited
- I-Fan Lin
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME
- Publication number 20230385511
- Publication date Nov 30, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Jung CHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CIRCUIT AND CACHE CIRCUIT CONFIGURATION
- Publication number 20230333981
- Publication date Oct 19, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Hsin Sean Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Circuit and Cache Circuit Configuration
- Publication number 20220129382
- Publication date Apr 28, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Hsin Sean Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME
- Publication number 20220027545
- Publication date Jan 27, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Jung CHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PATTERNING GRAPH REDUCTION AND CHECKING FLOW METHOD
- Publication number 20210279398
- Publication date Sep 9, 2021
- Taiwan Semiconductor Manufacturing Co., LTD
- Nien-Yu TSAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STANDARD CELL AND SEMICONDUCTOR DEVICE INCLUDING ANCHOR NODES AND M...
- Publication number 20200311333
- Publication date Oct 1, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Nien-Yu TSAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PATTERNING GRAPH REDUCTION AND CHECKING FLOW METHOD
- Publication number 20200167519
- Publication date May 28, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Nien-Yu TSAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF DETERMINING COLORABILITY OF A SEMICONDUCTOR DEVICE AND SY...
- Publication number 20200117848
- Publication date Apr 16, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chung-Yun CHENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT AND SYSTEM OF MANUFACTURING THE SAME
- Publication number 20200097630
- Publication date Mar 26, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Jung CHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING SAME
- Publication number 20200097629
- Publication date Mar 26, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Jung CHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Circuit and Cache Circuit Configuration
- Publication number 20200026648
- Publication date Jan 23, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Hsin Sean Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF DETERMINING COLORABILITY OF A SEMICONDUCTOR DEVICE AND SY...
- Publication number 20190171789
- Publication date Jun 6, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chung-Yun CHENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STANDARD CELL AND SEMICONDUCTOR DEVICE INCLUDING ANCHOR NODES
- Publication number 20190130061
- Publication date May 2, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Nien-Yu TSAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20180341735
- Publication date Nov 29, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Jung CHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR LAYOUT GENERATION WITH CONSTRAINED HYPERGRAPH PARTITIONING
- Publication number 20180150585
- Publication date May 31, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tsun-Yu YANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PATTERNING GRAPH REDUCTION AND CHECKING FLOW METHOD
- Publication number 20180068049
- Publication date Mar 8, 2018
- Taiwan Semiconductor Manufacturing Co., LTD
- Nien-Yu TSAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF GENERATING MODIFIED LAYOUT AND SYSTEM THEREFOR
- Publication number 20170316142
- Publication date Nov 2, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Ming HO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF DESIGNING A SEMICONDUCTOR DEVICE, SYSTEM FOR IMPLEMENTING...
- Publication number 20170161424
- Publication date Jun 8, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Nien-Yu TSAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MASK DESIGN BASED ON SENSITIVITIES TO CHANGES IN PATTERN SPACING
- Publication number 20170004252
- Publication date Jan 5, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Cheng CHOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Circuit and Cache Circuit Configuration
- Publication number 20160364331
- Publication date Dec 15, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Hsin Sean LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LAYER SEMICONDUCTOR STRUCTURES FOR FABRICATING INVERTER CHAINS
- Publication number 20160284603
- Publication date Sep 29, 2016
- Taiwan Semiconductor Manufacturing Company Limited
- I-FAN LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR CAPACITANCE EXTRACTION
- Publication number 20160232270
- Publication date Aug 11, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Cheng CHOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, DEVICE AND COMPUTER PROGRAM PRODUCT FOR INTEGRATED CIRCUIT...
- Publication number 20160147928
- Publication date May 26, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Ming HO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CELL BASED HYBRID RC EXTRACTION
- Publication number 20160063165
- Publication date Mar 3, 2016
- Taiwan Semiconductor Manufacturing Company Limited
- Ze-Ming Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF GENERATING MODIFIED LAYOUT FOR RC EXTRACTION
- Publication number 20160042108
- Publication date Feb 11, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Ming HO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR VERIFYING THE DESIGN OF AN INTEGRATED CIRCUIT...
- Publication number 20150269303
- Publication date Sep 24, 2015
- Taiwan Semiconcuctor Manufacturing Co., Ltd.
- Yao-Hsien TSAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MASK SHIFT RESISTANCE-INDUCTANCE METHOD FOR MULTIPLE PATTERNING MAS...
- Publication number 20150234975
- Publication date Aug 20, 2015
- TAIWAN SEMICONDUCTOR MANUFACTURING COMAPNY, LTD.
- Chih-Cheng CHOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMON TEMPLATE FOR ELECTRONIC ARTICLE
- Publication number 20150213182
- Publication date Jul 30, 2015
- Taiwan Semiconductor Manufacturing Company Limited
- William Wu Shen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LAYER SEMICONDUCTOR STRUCTURES FOR FABRICATING INVERTER CHAINS
- Publication number 20150179648
- Publication date Jun 25, 2015
- Taiwan Semiconductor Manufacturing Company Limited
- I-FAN LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-PATTERNING MASK DECOMPOSITION METHOD AND SYSTEM
- Publication number 20150040077
- Publication date Feb 5, 2015
- Taiwan Semiconductor Manufacturing Co., LTD
- Chia-Ming HO
- G06 - COMPUTING CALCULATING COUNTING

Hsien-Hsin Sean LEE

Person

Patents Grantslast 30 patents

Integrated circuit and method of manufacturing the same

Memory circuit and cache circuit configuration

Integrated circuit and method of manufacturing the same

Memory circuit and cache circuit configuration

Multi-patterning graph reduction and checking flow method

Memory circuit and cache circuit configuration

Integrated circuit and system of manufacturing the same

Standard cell and semiconductor device including anchor nodes and m...

Integrated circuit and method for manufacturing same

Multi-patterning graph reduction and checking flow method

Method of determining colorability of a semiconductor device and sy...

Standard cell and semiconductor device including anchor nodes

Method of determining colorability of a semiconductor device and sy...

Method for layout generation with constrained hypergraph partitioning

Integrated circuit and method for manufacturing the same

Multi-patterning graph reduction and checking flow method

Memory circuit and cache circuit configuration

Method of determining colorability of a semiconductor device and sy...

Method of designing a semiconductor device, system for implementing...

Method, device and computer program product for integrated circuit...

Method of generating modified layout and system therefor

Mask design based on sensitivities to changes in pattern spacing

Method of generating modified layout for RC extraction

Multi-layer semiconductor structures for fabricating inverter chains

Common template for electronic article

System and method for creating hybrid resistance and capacitance (R...

Method and apparatus for capacitance extraction

Mask shift resistance-inductance method for multiple patterning mas...

Memory circuit and cache circuit configuration

Multi-layer semiconductor structures for fabricating inverter chains

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME

MEMORY CIRCUIT AND CACHE CIRCUIT CONFIGURATION

Memory Circuit and Cache Circuit Configuration

INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME

MULTI-PATTERNING GRAPH REDUCTION AND CHECKING FLOW METHOD

STANDARD CELL AND SEMICONDUCTOR DEVICE INCLUDING ANCHOR NODES AND M...

MULTI-PATTERNING GRAPH REDUCTION AND CHECKING FLOW METHOD

METHOD OF DETERMINING COLORABILITY OF A SEMICONDUCTOR DEVICE AND SY...

INTEGRATED CIRCUIT AND SYSTEM OF MANUFACTURING THE SAME

INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING SAME

Memory Circuit and Cache Circuit Configuration

METHOD OF DETERMINING COLORABILITY OF A SEMICONDUCTOR DEVICE AND SY...

STANDARD CELL AND SEMICONDUCTOR DEVICE INCLUDING ANCHOR NODES

INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME

METHOD FOR LAYOUT GENERATION WITH CONSTRAINED HYPERGRAPH PARTITIONING

MULTI-PATTERNING GRAPH REDUCTION AND CHECKING FLOW METHOD

METHOD OF GENERATING MODIFIED LAYOUT AND SYSTEM THEREFOR

METHOD OF DESIGNING A SEMICONDUCTOR DEVICE, SYSTEM FOR IMPLEMENTING...

MASK DESIGN BASED ON SENSITIVITIES TO CHANGES IN PATTERN SPACING

Memory Circuit and Cache Circuit Configuration

MULTI-LAYER SEMICONDUCTOR STRUCTURES FOR FABRICATING INVERTER CHAINS

METHOD AND APPARATUS FOR CAPACITANCE EXTRACTION

METHOD, DEVICE AND COMPUTER PROGRAM PRODUCT FOR INTEGRATED CIRCUIT...

CELL BASED HYBRID RC EXTRACTION

METHOD OF GENERATING MODIFIED LAYOUT FOR RC EXTRACTION

METHOD AND SYSTEM FOR VERIFYING THE DESIGN OF AN INTEGRATED CIRCUIT...

MASK SHIFT RESISTANCE-INDUCTANCE METHOD FOR MULTIPLE PATTERNING MAS...

COMMON TEMPLATE FOR ELECTRONIC ARTICLE

MULTI-LAYER SEMICONDUCTOR STRUCTURES FOR FABRICATING INVERTER CHAINS

MULTI-PATTERNING MASK DECOMPOSITION METHOD AND SYSTEM