Hsien-Pao Yang

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Folsom, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
DDR memory bus with a reduced data strobe signal preamble timespan
- Patent number 11,074,959
- Issue date Jul 27, 2021
- Intel Corporation
- James A. McCall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual power I/O transmitter
- Patent number 10,923,164
- Issue date Feb 16, 2021
- Intel Corporation
- Hariprasath Venkatram
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic reconfigurable dual power I/O receiver
- Patent number 10,672,438
- Issue date Jun 2, 2020
- Intel Corporation
- Mohammed G. Mostofa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DDR memory bus with a reduced data strobe signal preamble timespan
- Patent number 10,541,018
- Issue date Jan 21, 2020
- Intel Corporation
- James A. McCall
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DDR MEMORY BUS WITH A REDUCED DATA STROBE SIGNAL PREAMBLE TIMESPAN
- Publication number 20200286543
- Publication date Sep 10, 2020
- Intel Corporation
- James A. McCALL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL POWER I/O TRANSMITTER
- Publication number 20200105317
- Publication date Apr 2, 2020
- Intel Corporation
- Hariprasath VENKATRAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC RECONFIGURABLE DUAL POWER I/O RECEIVER
- Publication number 20200105319
- Publication date Apr 2, 2020
- Intel Corporation
- Mohammed G. Mostofa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR MEMORY BUS WITH A REDUCED DATA STROBE SIGNAL PREAMBLE TIMESPAN
- Publication number 20190096468
- Publication date Mar 28, 2019
- James A. McCALL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Termination control in memory systems
- Publication number 20070005826
- Publication date Jan 4, 2007
- Hsien-Pao Yang
- G06 - COMPUTING CALCULATING COUNTING