Hsin H. Wang

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Barrier structures for underfill containment
- Patent number 12,002,727
- Issue date Jun 4, 2024
- Intel Corporation
- Ziyin Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive route patterning for electronic substrates
- Patent number 11,817,349
- Issue date Nov 14, 2023
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method, device and system for providing etched metallization struct...
- Patent number 11,528,811
- Issue date Dec 13, 2022
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method, device and system for providing etched metallization struct...
- Patent number 11,116,084
- Issue date Sep 7, 2021
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced etch anisotropy using nanoparticles as banking agents in t...
- Patent number 10,515,824
- Issue date Dec 24, 2019
- Intel Corporation
- Jeremy Ecton
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Selective epitaxial silicon for intrinsic-extrinsic base link
- Patent number 5,420,454
- Issue date May 30, 1995
- Dietrich W. Vook
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING MULTI-HEIGHT CELLS
- Publication number 20250212525
- Publication date Jun 26, 2025
- Intel Corporation
- Andy Chih-Hung WEI
Information Patent Application
THERMAL GROUNDING IN BACKSIDE POWER SCHEMES USING CARRIER WAFERS
- Publication number 20240332126
- Publication date Oct 3, 2024
- Intel Corporation
- Andy Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENABLING COPPER RECESS FLATTENING THROUGH BLOCKED COPPER ETCHING PR...
- Publication number 20240222130
- Publication date Jul 4, 2024
- Intel Corporation
- Shaojiang CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH MULTI-LAYERED METALLIZATION LINES
- Publication number 20240006327
- Publication date Jan 4, 2024
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CARRIER FOR MICROELECTRONIC ASSEMBLIES HAVING DIRECT BONDING
- Publication number 20220199453
- Publication date Jun 23, 2022
- Intel Corporation
- Michael J. Baker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD, DEVICE AND SYSTEM FOR PROVIDING ETCHED METALLIZATION STRUCT...
- Publication number 20210289638
- Publication date Sep 16, 2021
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE ROUTE PATTERNING FOR ELECTRONIC SUBSTRATES
- Publication number 20210280463
- Publication date Sep 9, 2021
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BARRIER STRUCTURES FOR UNDERFILL CONTAINMENT
- Publication number 20210249322
- Publication date Aug 12, 2021
- Intel Corporation
- Ziyin Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD, DEVICE AND SYSTEM FOR PROVIDING ETCHED METALLIZATION STRUCT...
- Publication number 20200236795
- Publication date Jul 23, 2020
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED ETCH ANISOTROPY USING NANOPARTICLES AS BANKING AGENTS IN T...
- Publication number 20190214272
- Publication date Jul 11, 2019
- Intel Cororation
- Jeremy ECTON
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Hsin H. Wang

Person

Patents Grantslast 30 patents

Barrier structures for underfill containment

Conductive route patterning for electronic substrates

Method, device and system for providing etched metallization struct...

Method, device and system for providing etched metallization struct...

Enhanced etch anisotropy using nanoparticles as banking agents in t...

Selective epitaxial silicon for intrinsic-extrinsic base link

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT STRUCTURES HAVING MULTI-HEIGHT CELLS

THERMAL GROUNDING IN BACKSIDE POWER SCHEMES USING CARRIER WAFERS

ENABLING COPPER RECESS FLATTENING THROUGH BLOCKED COPPER ETCHING PR...

INTEGRATED CIRCUIT PACKAGE WITH MULTI-LAYERED METALLIZATION LINES

CARRIER FOR MICROELECTRONIC ASSEMBLIES HAVING DIRECT BONDING

METHOD, DEVICE AND SYSTEM FOR PROVIDING ETCHED METALLIZATION STRUCT...

CONDUCTIVE ROUTE PATTERNING FOR ELECTRONIC SUBSTRATES

BARRIER STRUCTURES FOR UNDERFILL CONTAINMENT

METHOD, DEVICE AND SYSTEM FOR PROVIDING ETCHED METALLIZATION STRUCT...

ENHANCED ETCH ANISOTROPY USING NANOPARTICLES AS BANKING AGENTS IN T...