HSIN-HUNG LIAO

Person

TAIPEI CITY, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Method of manufacturing memory structure
- Patent number 11,508,739
- Issue date Nov 22, 2022
- Powerchip Semiconductor Manufacturing Corporation
- Hui-Chin Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Establishing method for timing model
- Patent number 11,256,838
- Issue date Feb 22, 2022
- Hsin-Hsiung Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanisms for forming bonding structures
- Patent number 11,233,032
- Issue date Jan 25, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yeong-Jyh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating semiconductor package structure
- Patent number 11,139,177
- Issue date Oct 5, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chien-Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive micro pin
- Patent number 11,101,232
- Issue date Aug 24, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Ying-Jui Huang
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Grant
Semiconductor package structure
- Patent number 11,094,561
- Issue date Aug 17, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chien-Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device
- Patent number 11,009,914
- Issue date May 18, 2021
- Pegatron Corporation
- Chien-I Chen
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Grant
Mutli-chip package with encapsulated conductor via
- Patent number 10,867,890
- Issue date Dec 15, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chien-Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Timing model, timing model building method, and related top-level a...
- Patent number 10,817,633
- Issue date Oct 27, 2020
- Global Unichip Corporation
- Meng-Hsiu Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor wafer device and manufacturing method thereof
- Patent number 10,770,331
- Issue date Sep 8, 2020
- Taiwan Semiconductor Manufacturing Company Ltd.
- Bor-Ping Jang
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method and system for thinning wafer thereof
- Patent number 10,727,074
- Issue date Jul 28, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chien Ling Hwang
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Interconnect structure for semiconductor package and method of fabr...
- Patent number 10,679,866
- Issue date Jun 9, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chien-Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Model-building method for building top interface logic model
- Patent number 10,614,260
- Issue date Apr 7, 2020
- Global Unichip Corporation
- Meng-Hsiu Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for controlling warpage in packaging
- Patent number 10,510,712
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mechanisms for forming bonding structures
- Patent number 10,504,870
- Issue date Dec 10, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yeong-Jyh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for mounting components in semiconductor fabricat...
- Patent number 10,438,922
- Issue date Oct 8, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chien-Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Model-building method and model-building system
- Patent number 10,311,185
- Issue date Jun 4, 2019
- Global Unichip Corporation
- Hsin-Hsiung Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated fan-out package
- Patent number 10,276,509
- Issue date Apr 30, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chih-Hao Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure, fan-out package structure and method of the same
- Patent number 10,269,582
- Issue date Apr 23, 2019
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chien Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for controlling warpage in packaging
- Patent number 10,157,881
- Issue date Dec 18, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing micro pins and isolated conductive micro pin
- Patent number 10,115,690
- Issue date Oct 30, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd
- Ying-Jui Huang
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Grant
Semiconductor wafer device and manufacturing method thereof
- Patent number 10,056,285
- Issue date Aug 21, 2018
- Taiwan Semiconductor Manufacturing Company Ltd.
- Bor-Ping Jang
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated fan-out package and method of fabricating the same
- Patent number 9,984,960
- Issue date May 29, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chien-Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated fan-out package and method of fabricating the same
- Patent number 9,870,997
- Issue date Jan 16, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chih-Hao Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure, fan-out package structure and method of the same
- Patent number 9,870,929
- Issue date Jan 16, 2018
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chien Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor wafer device and manufacturing method thereof
- Patent number 9,812,346
- Issue date Nov 7, 2017
- Taiwan Semiconductor Manufacturing Company Ltd.
- Bor-Ping Jang
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Mechanisms for forming bonding structures
- Patent number 9,768,142
- Issue date Sep 19, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yeong-Jyh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Timing analysis method for digital circuit design and system thereof
- Patent number 9,710,580
- Issue date Jul 18, 2017
- Global Unichip Corporation
- Teng-Nan Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for forming apparatus for stud bump formation
- Patent number 9,498,851
- Issue date Nov 22, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yeong-Jyh Lin
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods for controlling warpage in packaging
- Patent number 9,484,226
- Issue date Nov 1, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
A REMOTE CONTROL METHOD OF SAMPLE PREPARATION AND/OR SAMPLE ANALYSIS
- Publication number 20220107332
- Publication date Apr 7, 2022
- MSSCORPS CO., LTD.
- CHI-LUN LIU
- G05 - CONTROLLING REGULATING
Information Patent Application
METHOD OF MANUFACTURING MEMORY STURCTURE
- Publication number 20210320113
- Publication date Oct 14, 2021
- Powerchip Semiconductor Manufacturing Corporation
- Hui-Chin Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ESTABLISHING METHOD FOR TIMING MODEL
- Publication number 20210303767
- Publication date Sep 30, 2021
- GLOBAL UNICHIP CORPORATION
- Hsin-Hsiung Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR THINNING WAFER THEREOF
- Publication number 20200357651
- Publication date Nov 12, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Chien-Ling HWANG
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
TIMING MODEL, TIMING MODEL BUILDING METHOD, AND RELATED TOP-LEVEL A...
- Publication number 20200311218
- Publication date Oct 1, 2020
- Global Unichip Corporation
- Meng-Hsiu TSAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR PACKAGE STRUCTURE
- Publication number 20200303214
- Publication date Sep 24, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chien-Ling HWANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING SEMICONDUCTOR PACKAGE STRUCTURE
- Publication number 20200303213
- Publication date Sep 24, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chien-Ling HWANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE
- Publication number 20200225709
- Publication date Jul 16, 2020
- PEGATRON CORPORATION
- Chien-I Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDCUTOR PACKAGE AND METHOD OF DICING SEMICONDUCTOR DEVICE
- Publication number 20200203270
- Publication date Jun 25, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chung-Shi Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE
- Publication number 20200183459
- Publication date Jun 11, 2020
- PEGATRON CORPORATION
- CHIEN-I CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanisms for Forming Bonding Structures
- Publication number 20200105710
- Publication date Apr 2, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yeong-Jyh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20200105689
- Publication date Apr 2, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chien-Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MODEL-BUILDING METHOD FOR BUILDING TOP INTERFACE LOGIC MODEL
- Publication number 20190294746
- Publication date Sep 26, 2019
- Global Unichip Corporation
- Meng-Hsiu TSAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods for Controlling Warpage in Packaging
- Publication number 20190123018
- Publication date Apr 25, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE MICRO PIN
- Publication number 20190074259
- Publication date Mar 7, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Ying-Jui HUANG
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Application
SEMICONDUCTOR WAFER DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20180358255
- Publication date Dec 13, 2018
- Taiwan Semiconductor Manufacturing company Ltd.
- BOR-PING JANG
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
MODEL-BUILDING METHOD AND MODEL-BUILDING SYSTEM
- Publication number 20180330033
- Publication date Nov 15, 2018
- Global Unichip Corporation
- Hsin-Hsiung LIAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKAGE STRUCTURE, FAN-OUT PACKAGE STRUCTURE AND METHOD OF THE SAME
- Publication number 20180130673
- Publication date May 10, 2018
- Taiwan Semiconductor Manufacturing company Ltd.
- CHIEN LING HWANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED FAN-OUT PACKAGE
- Publication number 20180090445
- Publication date Mar 29, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-Hao Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR WAFER DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20180047611
- Publication date Feb 15, 2018
- Taiwan Semiconductor Manufacturing company Ltd.
- BOR-PING JANG
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING THE SAME
- Publication number 20180025966
- Publication date Jan 25, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chien-Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Mechanisms For Forming Bonding Structures
- Publication number 20180005976
- Publication date Jan 4, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yeong-Jyh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND SYSTEM FOR MOUNTING COMPONENTS IN SEMICONDUCTOR FABRICAT...
- Publication number 20170352641
- Publication date Dec 7, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chien-Ling HWANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING THE SAME
- Publication number 20170345764
- Publication date Nov 30, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-Hao Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE STRUCTURE, FAN-OUT PACKAGE STRUCTURE AND METHOD OF THE SAME
- Publication number 20170110403
- Publication date Apr 20, 2017
- Taiwan Semiconductor Manufacturing company Ltd.
- CHIEN LING HWANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for Controlling Warpage in Packaging
- Publication number 20170032980
- Publication date Feb 2, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien Ling Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TIMING ANALYSIS METHOD FOR DIGITAL CIRCUIT DESIGN AND SYSTEM THEREOF
- Publication number 20170011161
- Publication date Jan 12, 2017
- GLOBAL UNICHIP CORPORATION
- Teng-Nan Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF MANUFACTURING MICRO PINS AND ISOLATED CONDUCTIVE MICRO PIN
- Publication number 20160254239
- Publication date Sep 1, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Ying-Jui HUANG
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Application
INTERCONNECT STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHOD OF FABR...
- Publication number 20160240451
- Publication date Aug 18, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chien-Ling HWANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR WAFER DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20160099165
- Publication date Apr 7, 2016
- Taiwan Semiconductor Manufacturing company Ltd.
- BOR-PING JANG
- H01 - BASIC ELECTRIC ELEMENTS

HSIN-HUNG LIAO

Person

Patents Grantslast 30 patents

Method of manufacturing memory structure

Establishing method for timing model

Mechanisms for forming bonding structures

Method of fabricating semiconductor package structure

Conductive micro pin

Semiconductor package structure

Electronic device

Mutli-chip package with encapsulated conductor via

Timing model, timing model building method, and related top-level a...

Semiconductor wafer device and manufacturing method thereof

Method and system for thinning wafer thereof

Interconnect structure for semiconductor package and method of fabr...

Model-building method for building top interface logic model

Methods for controlling warpage in packaging

Mechanisms for forming bonding structures

Method and system for mounting components in semiconductor fabricat...

Model-building method and model-building system

Integrated fan-out package

Package structure, fan-out package structure and method of the same

Methods for controlling warpage in packaging

Method of manufacturing micro pins and isolated conductive micro pin

Semiconductor wafer device and manufacturing method thereof

Integrated fan-out package and method of fabricating the same

Integrated fan-out package and method of fabricating the same

Package structure, fan-out package structure and method of the same

Semiconductor wafer device and manufacturing method thereof

Mechanisms for forming bonding structures

Timing analysis method for digital circuit design and system thereof

Methods for forming apparatus for stud bump formation

Methods for controlling warpage in packaging

Patents Applicationslast 30 patents

A REMOTE CONTROL METHOD OF SAMPLE PREPARATION AND/OR SAMPLE ANALYSIS

METHOD OF MANUFACTURING MEMORY STURCTURE

ESTABLISHING METHOD FOR TIMING MODEL

METHOD AND SYSTEM FOR THINNING WAFER THEREOF

TIMING MODEL, TIMING MODEL BUILDING METHOD, AND RELATED TOP-LEVEL A...

SEMICONDUCTOR PACKAGE STRUCTURE

METHOD OF FABRICATING SEMICONDUCTOR PACKAGE STRUCTURE

ELECTRONIC DEVICE

SEMICONDCUTOR PACKAGE AND METHOD OF DICING SEMICONDUCTOR DEVICE

ELECTRONIC DEVICE

Mechanisms for Forming Bonding Structures

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

MODEL-BUILDING METHOD FOR BUILDING TOP INTERFACE LOGIC MODEL

Methods for Controlling Warpage in Packaging

CONDUCTIVE MICRO PIN

SEMICONDUCTOR WAFER DEVICE AND MANUFACTURING METHOD THEREOF

MODEL-BUILDING METHOD AND MODEL-BUILDING SYSTEM

PACKAGE STRUCTURE, FAN-OUT PACKAGE STRUCTURE AND METHOD OF THE SAME

INTEGRATED FAN-OUT PACKAGE

SEMICONDUCTOR WAFER DEVICE AND MANUFACTURING METHOD THEREOF

INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING THE SAME

Mechanisms For Forming Bonding Structures

METHOD AND SYSTEM FOR MOUNTING COMPONENTS IN SEMICONDUCTOR FABRICAT...

INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING THE SAME

PACKAGE STRUCTURE, FAN-OUT PACKAGE STRUCTURE AND METHOD OF THE SAME

Methods for Controlling Warpage in Packaging

TIMING ANALYSIS METHOD FOR DIGITAL CIRCUIT DESIGN AND SYSTEM THEREOF

METHOD OF MANUFACTURING MICRO PINS AND ISOLATED CONDUCTIVE MICRO PIN

INTERCONNECT STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHOD OF FABR...

SEMICONDUCTOR WAFER DEVICE AND MANUFACTURING METHOD THEREOF