Hsin-Ming Hou

Person

Tainan City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Hierarchical wafer lifetime prediction method
- Patent number 9,958,494
- Issue date May 1, 2018
- United Microelectronics Corp.
- Hsin-Ming Hou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device with epitaxial structures and method for fabri...
- Patent number 9,443,970
- Issue date Sep 13, 2016
- United Microelectronics Corporation
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor structure and manufacturing method for the same
- Patent number 9,299,624
- Issue date Mar 29, 2016
- United Microelectronics Corp.
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method for fabricating the same
- Patent number 9,202,914
- Issue date Dec 1, 2015
- United Microelectronics Corporation
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-gate transistor device
- Patent number 9,159,809
- Issue date Oct 13, 2015
- United Microelectronics Corp.
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hierarchical wafer yield prediction method and hierarchical lifetim...
- Patent number 9,129,076
- Issue date Sep 8, 2015
- United Microelectronics Corp.
- Hsin-Ming Hou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Experiments method for predicting wafer fabrication outcome
- Patent number 8,965,550
- Issue date Feb 24, 2015
- United Microelectronics Corp.
- Hsin-Ming Hou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout correcting method and layout correcting system
- Patent number 8,930,865
- Issue date Jan 6, 2015
- United Microelectronics Corp.
- Hsin-Ming Hou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transistor array for testing
- Patent number 8,643,397
- Issue date Feb 4, 2014
- Untied Microelectronics Corp.
- Hsin-Ming Hou
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit design and fabrication method by way of detectin...
- Patent number 8,434,030
- Issue date Apr 30, 2013
- United Microelectronics Corporation
- Hsin-Ming Hou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout of dummy patterns
- Patent number 8,410,571
- Issue date Apr 2, 2013
- United Microelectronics Corp.
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of disposing and arranging dummy patterns
- Patent number 7,566,647
- Issue date Jul 28, 2009
- United Microelectronics Corp.
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
COMPLEMENTARY HIGH ELECTRON MOBILITY TRANSISTOR
- Publication number 20230207679
- Publication date Jun 29, 2023
- UNITED MICROELECTRONICS CORP.
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INSULATED GATE BIPOLAR TRANSISTOR
- Publication number 20230207672
- Publication date Jun 29, 2023
- UNITED MICROELECTRONICS CORP.
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PROCESS PREDICTION METHOD AND SEMICONDUCTOR PROCESS P...
- Publication number 20220237450
- Publication date Jul 28, 2022
- United Microelectronics Corp.
- Hsin-Ming HOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR PROCESS PREDICTION METHOD AND SEMICONDUCTOR PROCESS P...
- Publication number 20220237451
- Publication date Jul 28, 2022
- United Microelectronics Corp.
- Hsin-Ming HOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
- Publication number 20160049506
- Publication date Feb 18, 2016
- UNITED MICROELECTRONICS CORPORATION
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Hierarchical Wafer Lifetime Prediction Method
- Publication number 20150323586
- Publication date Nov 12, 2015
- UNITED MICROELECTRONICS CORP.
- Hsin-Ming Hou
- G01 - MEASURING TESTING
Information Patent Application
STACKED SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR THE SAME
- Publication number 20150206810
- Publication date Jul 23, 2015
- United Microelectronics Corp.
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Hierarchical Wafer Yield Prediction Method and Hierarchical Lifetim...
- Publication number 20140089871
- Publication date Mar 27, 2014
- UNITED MICROELECTRONICS CORP.
- Hsin-Ming Hou
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
- Publication number 20130240956
- Publication date Sep 19, 2013
- UNITED MICROELECTRONICS CORPORATION
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-GATE TRANSISTOR DEVICE
- Publication number 20130221407
- Publication date Aug 29, 2013
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Experiments Method for Predicting Wafer Fabrication Outcome
- Publication number 20130110272
- Publication date May 2, 2013
- Hsin-Ming Hou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSISTOR ARRAY FOR TESTING
- Publication number 20130076388
- Publication date Mar 28, 2013
- United Microelectronics Corp.
- HSIN-MING HOU
- G01 - MEASURING TESTING
Information Patent Application
Hierarchical Wafer Yield Predicting Method and Hierarchical Lifetim...
- Publication number 20130061188
- Publication date Mar 7, 2013
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LAYOUT OF DUMMY PATTERNS
- Publication number 20090008803
- Publication date Jan 8, 2009
- United Microelectronics Corp.
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF DISPOSING AND ARRANGING DUMMY PATTERNS
- Publication number 20080124910
- Publication date May 29, 2008
- United Microelectronics Corp.
- Hsin-Ming Hou
- H01 - BASIC ELECTRIC ELEMENTS

Hsin-Ming Hou

Person

Patents Grantslast 30 patents

Hierarchical wafer lifetime prediction method

Semiconductor device with epitaxial structures and method for fabri...

Stacked semiconductor structure and manufacturing method for the same

Semiconductor device and method for fabricating the same

Multi-gate transistor device

Hierarchical wafer yield prediction method and hierarchical lifetim...

Experiments method for predicting wafer fabrication outcome

Layout correcting method and layout correcting system

Transistor array for testing

Integrated circuit design and fabrication method by way of detectin...

Layout of dummy patterns

Method of disposing and arranging dummy patterns

Patents Applicationslast 30 patents

COMPLEMENTARY HIGH ELECTRON MOBILITY TRANSISTOR

INSULATED GATE BIPOLAR TRANSISTOR

SEMICONDUCTOR PROCESS PREDICTION METHOD AND SEMICONDUCTOR PROCESS P...

SEMICONDUCTOR PROCESS PREDICTION METHOD AND SEMICONDUCTOR PROCESS P...

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Hierarchical Wafer Lifetime Prediction Method

STACKED SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR THE SAME

Hierarchical Wafer Yield Prediction Method and Hierarchical Lifetim...

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

MULTI-GATE TRANSISTOR DEVICE

Experiments Method for Predicting Wafer Fabrication Outcome

TRANSISTOR ARRAY FOR TESTING

Hierarchical Wafer Yield Predicting Method and Hierarchical Lifetim...

LAYOUT OF DUMMY PATTERNS

METHOD OF DISPOSING AND ARRANGING DUMMY PATTERNS