Hsingjen Wann

Person

Carmel, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
(110) surface orientation for reducing fermi-level-pinning between...
- Patent number 10,964,817
- Issue date Mar 30, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chao-Ching Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
(110) surface orientation for reducing fermi-level-pinning between...
- Patent number 10,770,588
- Issue date Sep 8, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chao-Ching Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
(110) surface orientation for reducing fermi-level-pinning between...
- Patent number 9,406,518
- Issue date Aug 2, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chao-Ching Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin field effect transistor gate oxide
- Patent number 9,105,661
- Issue date Aug 11, 2015
- Taiwan Semconductor Manufacturing Company, Ltd.
- Gin-Chen Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for high performance interconnect
- Patent number 8,716,863
- Issue date May 6, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsingjen Wann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of improved SOI substrates using bulk semiconductor wafers
- Patent number 8,268,698
- Issue date Sep 18, 2012
- International Business Machines Corporation
- William K. Henson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of improved SOI substrates using bulk semiconductor wafers
- Patent number 7,932,158
- Issue date Apr 26, 2011
- International Business Machines Corporation
- William K. Henson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of improved SOI substrates using bulk semiconductor wafers
- Patent number 7,452,784
- Issue date Nov 18, 2008
- International Business Machines Corporation
- William K. Henson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dense SRAM cells with selective SOI
- Patent number 6,876,040
- Issue date Apr 5, 2005
- International Business Machines Corporation
- Hsingjen Wann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recessed-gate MOSFET with out-diffused source/drain extension
- Patent number 6,093,947
- Issue date Jul 25, 2000
- International Business Machines Corporation
- Hussein Ibrahim Hanafi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for making high-aspect ratio holes in semiconductor and its...
- Patent number 6,063,699
- Issue date May 16, 2000
- International Business Machines Corporation
- Hussein Ibrahim Hanafi
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
(110) SURFACE ORIENTATION FOR REDUCING FERMI-LEVEL-PINNING BETWEEN...
- Publication number 20130126985
- Publication date May 23, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chao-Ching Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD FOR HIGH PERFORMANCE INTERCONNECT
- Publication number 20130015581
- Publication date Jan 17, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsingjen Wann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS
- Publication number 20110147885
- Publication date Jun 23, 2011
- International Business Machines Corporation
- William K. Henson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS
- Publication number 20090039461
- Publication date Feb 12, 2009
- International Business Machines Corporation
- William K. Henson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS
- Publication number 20070275537
- Publication date Nov 29, 2007
- International Business Machines Corporation
- William K. Henson
- H01 - BASIC ELECTRIC ELEMENTS

Hsingjen Wann

Person

Patents Grantslast 30 patents

(110) surface orientation for reducing fermi-level-pinning between...

(110) surface orientation for reducing fermi-level-pinning between...

(110) surface orientation for reducing fermi-level-pinning between...

Fin field effect transistor gate oxide

Structure and method for high performance interconnect

Formation of improved SOI substrates using bulk semiconductor wafers

Formation of improved SOI substrates using bulk semiconductor wafers

Formation of improved SOI substrates using bulk semiconductor wafers

Dense SRAM cells with selective SOI

Recessed-gate MOSFET with out-diffused source/drain extension

Methods for making high-aspect ratio holes in semiconductor and its...

Patents Applicationslast 30 patents

(110) SURFACE ORIENTATION FOR REDUCING FERMI-LEVEL-PINNING BETWEEN...

STRUCTURE AND METHOD FOR HIGH PERFORMANCE INTERCONNECT

FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS

FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS

FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS