Hua Tan

Person

Shanghai, CN

People

Patents Grantslast 30 patents

Information Patent Grant
Two-stage buffer operations supporting write commands
- Patent number 11,972,109
- Issue date Apr 30, 2024
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic power control
- Patent number 11,886,266
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Junjun Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhancement for activation and deactivation of memory address regions
- Patent number 11,886,341
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Nicola Colella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Balanced three-level read disturb management in a memory device
- Patent number 11,763,899
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Jun Jun Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for non-consecutive logical addresses
- Patent number 11,687,291
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with improved cross temperature reliability and read perform...
- Patent number 11,670,375
- Issue date Jun 6, 2023
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhancement for activation and deactivation of memory address regions
- Patent number 11,379,367
- Issue date Jul 5, 2022
- Micron Technology, Inc.
- Nicola Colella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with improved cross temperature reliability and read perform...
- Patent number 11,107,533
- Issue date Aug 31, 2021
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TWO-STAGE BUFFER OPERATIONS SUPPORTING WRITE COMMANDS
- Publication number 20240319884
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
A DYNAMIC READ DISTURB MANAGEMENT ALGORITHM FOR FLASH-BASED MEMORY
- Publication number 20240054070
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE BUFFER CONTROL IN MANAGED MEMORY SYSTEM
- Publication number 20230143181
- Publication date May 11, 2023
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-STAGE BUFFER OPERATIONS SUPPORTING WRITE COMMANDS
- Publication number 20230107227
- Publication date Apr 6, 2023
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR NON-CONSECUTIVE LOGICAL ADDRESSES
- Publication number 20230046402
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCEMENT FOR ACTIVATION AND DEACTIVATION OF MEMORY ADDRESS REGIONS
- Publication number 20220405205
- Publication date Dec 22, 2022
- Micron Technology, Inc.
- Nicola Colella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC POWER CONTROL
- Publication number 20220397953
- Publication date Dec 15, 2022
- Micron Technology, Inc.
- Junjun Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCEMENT FOR ACTIVATION AND DEACTIVATION OF MEMORY ADDRESS REGIONS
- Publication number 20220156185
- Publication date May 19, 2022
- Micron Technology, Inc.
- Nicola Colella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BALANCED THREE-LEVEL READ DISTURB MANAGEMENT IN A MEMORY DEVICE
- Publication number 20220044744
- Publication date Feb 10, 2022
- Micron Technology, Inc.
- Jun Jun Wang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH IMPROVED CROSS TEMPERATURE RELIABILITY AND READ PERFORM...
- Publication number 20210391013
- Publication date Dec 16, 2021
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH IMPROVED CROSS TEMPERATURE RELIABILITY AND READ PERFORM...
- Publication number 20200219568
- Publication date Jul 9, 2020
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Two-stage buffer operations supporting write commands

Dynamic power control

Enhancement for activation and deactivation of memory address regions

Balanced three-level read disturb management in a memory device

Techniques for non-consecutive logical addresses

Memory with improved cross temperature reliability and read perform...

Enhancement for activation and deactivation of memory address regions

Memory with improved cross temperature reliability and read perform...

Patents Applicationslast 30 patents

TWO-STAGE BUFFER OPERATIONS SUPPORTING WRITE COMMANDS

A DYNAMIC READ DISTURB MANAGEMENT ALGORITHM FOR FLASH-BASED MEMORY

WRITE BUFFER CONTROL IN MANAGED MEMORY SYSTEM

TWO-STAGE BUFFER OPERATIONS SUPPORTING WRITE COMMANDS

TECHNIQUES FOR NON-CONSECUTIVE LOGICAL ADDRESSES

ENHANCEMENT FOR ACTIVATION AND DEACTIVATION OF MEMORY ADDRESS REGIONS

DYNAMIC POWER CONTROL

ENHANCEMENT FOR ACTIVATION AND DEACTIVATION OF MEMORY ADDRESS REGIONS

BALANCED THREE-LEVEL READ DISTURB MANAGEMENT IN A MEMORY DEVICE

MEMORY WITH IMPROVED CROSS TEMPERATURE RELIABILITY AND READ PERFORM...

MEMORY WITH IMPROVED CROSS TEMPERATURE RELIABILITY AND READ PERFORM...