Hua Xue

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Mixed-width memory techniques for programmable logic devices
- Patent number 9,576,093
- Issue date Feb 21, 2017
- Lattice Semiconductor Corporation
- Venkatesan Rajappan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partition based design implementation for programmable logic devices
- Patent number 9,449,133
- Issue date Sep 20, 2016
- LATTICE SEMICONDUCTOR CORPORATION
- Hua Xue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simultaneous switching output noise estimation and reduction system...
- Patent number 7,895,555
- Issue date Feb 22, 2011
- Lattice Semiconductor Corporation
- Chris West
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output placement systems and methods to reduce simultaneous s...
- Patent number 7,788,620
- Issue date Aug 31, 2010
- Lattice Semiconductor Corporation
- Hua Xue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Algorithm to increase logic input width by cascading product terms
- Patent number 7,032,203
- Issue date Apr 18, 2006
- Lattice Semiconductor Corporation
- Gilles Bosco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for assigning signal routes via an interconnec...
- Patent number 6,199,192
- Issue date Mar 6, 2001
- Xilinix, Inc.
- Jose M. Marquez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for mapping product terms in a complex programmable logic de...
- Patent number 6,091,892
- Issue date Jul 18, 2000
- Xilinx, Inc.
- Hua Xue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Product term exporting mechanism and method improvement in an EPLD...
- Patent number 5,969,539
- Issue date Oct 19, 1999
- Xilinx, Inc.
- Isaak Veytsman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device placement method utilizing weighting func...
- Patent number 5,790,882
- Issue date Aug 4, 1998
- Xilinx, Inc.
- Joshua M. Silver
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MIXED-WIDTH MEMORY TECHNIQUES FOR PROGRAMMABLE LOGIC DEVICES
- Publication number 20150379164
- Publication date Dec 31, 2015
- Lattice Semiconductor Corporation
- Venkatesan Rajappan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTITION BASED DESIGN IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES
- Publication number 20150324509
- Publication date Nov 12, 2015
- Lattice Semiconductor Corporation
- Hua Xue
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Mixed-width memory techniques for programmable logic devices

Partition based design implementation for programmable logic devices

Simultaneous switching output noise estimation and reduction system...

Input/output placement systems and methods to reduce simultaneous s...

Algorithm to increase logic input width by cascading product terms

Method and apparatus for assigning signal routes via an interconnec...

Method for mapping product terms in a complex programmable logic de...

Product term exporting mechanism and method improvement in an EPLD...

Programmable logic device placement method utilizing weighting func...

Patents Applicationslast 30 patents

MIXED-WIDTH MEMORY TECHNIQUES FOR PROGRAMMABLE LOGIC DEVICES

PARTITION BASED DESIGN IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES