HUICHU LIU

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
SRAM design for energy efficient sequential access
- Patent number 12,068,054
- Issue date Aug 20, 2024
- Meta Platforms Technologies, LLC
- Huichu Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Schedule-aware tensor distribution module
- Patent number 11,907,827
- Issue date Feb 20, 2024
- Intel Corporation
- Gautham Chinya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-repair for sequential SRAM
- Patent number 11,869,617
- Issue date Jan 9, 2024
- Meta Platforms Technologies, LLC
- Huichu Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods, systems, articles of manufacture, and apparatus to decode...
- Patent number 11,804,851
- Issue date Oct 31, 2023
- Intel Corporation
- Gautham Chinya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low overhead, high bandwidth re-configurable interconnect apparatus...
- Patent number 11,734,174
- Issue date Aug 22, 2023
- Intel Corporation
- Huichu Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deep in memory architecture using resistive switches
- Patent number 11,522,012
- Issue date Dec 6, 2022
- Intel Corporation
- Jack T. Kavalieros
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetoelectric spin orbit logic based full adder
- Patent number 11,411,172
- Issue date Aug 9, 2022
- Intel Corporation
- Huichu Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Magnetoelectric spin orbit logic based minority gate
- Patent number 11,387,404
- Issue date Jul 12, 2022
- Intel Corporation
- Huichu Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth destructive read embedded memory
- Patent number 11,043,256
- Issue date Jun 22, 2021
- Intel Corporation
- Kaushik Vaidyanathan
- G11 - INFORMATION STORAGE
Information Patent Grant
Imprint-free write driver for ferroelectric memory
- Patent number 11,037,614
- Issue date Jun 15, 2021
- Intel Corporation
- Huichu Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Configurable interconnect apparatus and method
- Patent number 10,901,486
- Issue date Jan 26, 2021
- Intel Corporation
- Kaushik Vaidyanathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Save-restore circuitry with metal-ferroelectric-metal devices
- Patent number 10,777,250
- Issue date Sep 15, 2020
- Intel Corporation
- Kaushik Vaidyanathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combinatorial magneto electric spin orbit logic
- Patent number 10,749,104
- Issue date Aug 18, 2020
- Intel Corporation
- Huichu Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile SRAM
- Patent number 10,748,602
- Issue date Aug 18, 2020
- Intel Corporation
- Huichu Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Write congestion aware bypass for non-volatile memory, last level c...
- Patent number 10,331,582
- Issue date Jun 25, 2019
- Intel Corporation
- Ishwar S. Bhati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable interconnect apparatus and method
- Patent number 10,261,923
- Issue date Apr 16, 2019
- Intel Corporation
- Kaushik Vaidyanathan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Schedule-Aware Tensor Distribution Module
- Publication number 20240220785
- Publication date Jul 4, 2024
- Intel Corporation
- Gautham Chinya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, SYSTEMS, ARTICLES OF MANUFACTURE, AND APPARATUS TO DECODE...
- Publication number 20240022259
- Publication date Jan 18, 2024
- Intel Corporation
- Gautham Chinya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM DESIGN FOR ENERGY EFFICIENT SEQUENTIAL ACCESS
- Publication number 20230075959
- Publication date Mar 9, 2023
- Meta Platforms Technologies, LLC
- Huichu LIU
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE-ASSIST FOR SEQUENTIAL SRAM
- Publication number 20230065165
- Publication date Mar 2, 2023
- Meta Platforms Technologies, LLC
- Edith DALLARD
- G11 - INFORMATION STORAGE
Information Patent Application
SELF-REPAIR FOR SEQUENTIAL SRAM
- Publication number 20230065591
- Publication date Mar 2, 2023
- Meta Platforms Technologies, LLC
- Huichu LIU
- G11 - INFORMATION STORAGE
Information Patent Application
BANDWIDTH-AWARE FLEXIBLE-SCHEDULING MACHINE LEARNING ACCELERATOR
- Publication number 20220383081
- Publication date Dec 1, 2022
- Meta Platforms Technologies, LLC
- Huichu LIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW OVERHEAD, HIGH BANDWIDTH RE-CONFIGURABLE INTERCONNECT APPARATUS...
- Publication number 20210089448
- Publication date Mar 25, 2021
- Intel Corporation
- Huichu Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Schedule-Aware Tensor Distribution Module
- Publication number 20200410327
- Publication date Dec 31, 2020
- Intel Corporation
- Gautham Chinya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH BANDWIDTH DESTRUCTIVE READ EMBEDDED MEMORY
- Publication number 20200411079
- Publication date Dec 31, 2020
- Intel Corporation
- Kaushik Vaidyanathan
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS, SYSTEMS, ARTICLES OF MANUFACTURE, AND APPARATUS TO DECODE...
- Publication number 20200228137
- Publication date Jul 16, 2020
- Intel Corporation
- Gautham Chinya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINATORIAL MAGNETO ELECTRIC SPIN ORBIT LOGIC
- Publication number 20200194663
- Publication date Jun 18, 2020
- Huichu Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFIGURABLE PROCESSOR ELEMENT ARRAYS FOR IMPLEMENTING CONVOLUTIONA...
- Publication number 20200134417
- Publication date Apr 30, 2020
- Intel Corporation
- Debabrata Mohapatra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEEP IN MEMORY ARCHITECTURE USING RESISTIVE SWITCHES
- Publication number 20200105833
- Publication date Apr 2, 2020
- Jack T. KAVALIEROS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMPRINT-FREE WRITE DRIVER FOR FERROELECTRIC MEMORY
- Publication number 20200098415
- Publication date Mar 26, 2020
- Intel Corporation
- Huichu Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MAGNETOELECTRIC SPIN ORBIT LOGIC BASED MINORITY GATE
- Publication number 20200091407
- Publication date Mar 19, 2020
- Huichu LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MAGNETOELECTRIC SPIN ORBIT LOGIC BASED FULL ADDER
- Publication number 20200091414
- Publication date Mar 19, 2020
- Huichu LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SAVE-RESTORE CIRCUITRY WITH METAL-FERROELECTRIC-METAL DEVICES
- Publication number 20190043549
- Publication date Feb 7, 2019
- Intel Corporation
- Kaushik Vaidyanathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE INTERCONNECT APPARATUS AND METHOD
- Publication number 20190034360
- Publication date Jan 31, 2019
- Intel Corporation
- Kaushik VAIDYANATHAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE SRAM
- Publication number 20190013063
- Publication date Jan 10, 2019
- Intel Corporation
- Huichu LIU
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR REDUCING WRITE CONGESTION IN NON-VOLATILE...
- Publication number 20180285268
- Publication date Oct 4, 2018
- Intel Corporation
- Kunal Kishore Korgaonkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE CONGESTION AWARE BYPASS FOR NON-VOLATILE MEMORY, LAST LEVEL C...
- Publication number 20180232311
- Publication date Aug 16, 2018
- Intel Corporation
- Ishwar S. Bhati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYMMETRICAL WRITE DRIVER FOR RESISTIVE MEMORY
- Publication number 20170345496
- Publication date Nov 30, 2017
- Intel Corporation
- Huichu LIU
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY CELL HAVING BOTTOM-SIDE OEL LAYER AN...
- Publication number 20170287555
- Publication date Oct 5, 2017
- Intel Corporation
- HUICHU LIU
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

SRAM design for energy efficient sequential access

Schedule-aware tensor distribution module

Self-repair for sequential SRAM

Methods, systems, articles of manufacture, and apparatus to decode...

Low overhead, high bandwidth re-configurable interconnect apparatus...

Deep in memory architecture using resistive switches

Magnetoelectric spin orbit logic based full adder

Magnetoelectric spin orbit logic based minority gate

High bandwidth destructive read embedded memory

Imprint-free write driver for ferroelectric memory

Configurable interconnect apparatus and method

Save-restore circuitry with metal-ferroelectric-metal devices

Combinatorial magneto electric spin orbit logic

Nonvolatile SRAM

Write congestion aware bypass for non-volatile memory, last level c...

Configurable interconnect apparatus and method

Patents Applicationslast 30 patents

Schedule-Aware Tensor Distribution Module

METHODS, SYSTEMS, ARTICLES OF MANUFACTURE, AND APPARATUS TO DECODE...

SRAM DESIGN FOR ENERGY EFFICIENT SEQUENTIAL ACCESS

WRITE-ASSIST FOR SEQUENTIAL SRAM

SELF-REPAIR FOR SEQUENTIAL SRAM

BANDWIDTH-AWARE FLEXIBLE-SCHEDULING MACHINE LEARNING ACCELERATOR

LOW OVERHEAD, HIGH BANDWIDTH RE-CONFIGURABLE INTERCONNECT APPARATUS...

Schedule-Aware Tensor Distribution Module

HIGH BANDWIDTH DESTRUCTIVE READ EMBEDDED MEMORY

METHODS, SYSTEMS, ARTICLES OF MANUFACTURE, AND APPARATUS TO DECODE...

COMBINATORIAL MAGNETO ELECTRIC SPIN ORBIT LOGIC

CONFIGURABLE PROCESSOR ELEMENT ARRAYS FOR IMPLEMENTING CONVOLUTIONA...

DEEP IN MEMORY ARCHITECTURE USING RESISTIVE SWITCHES

IMPRINT-FREE WRITE DRIVER FOR FERROELECTRIC MEMORY

MAGNETOELECTRIC SPIN ORBIT LOGIC BASED MINORITY GATE

MAGNETOELECTRIC SPIN ORBIT LOGIC BASED FULL ADDER

SAVE-RESTORE CIRCUITRY WITH METAL-FERROELECTRIC-METAL DEVICES

CONFIGURABLE INTERCONNECT APPARATUS AND METHOD

NONVOLATILE SRAM

METHOD AND APPARATUS FOR REDUCING WRITE CONGESTION IN NON-VOLATILE...

WRITE CONGESTION AWARE BYPASS FOR NON-VOLATILE MEMORY, LAST LEVEL C...

ASYMMETRICAL WRITE DRIVER FOR RESISTIVE MEMORY

RESISTIVE RANDOM ACCESS MEMORY CELL HAVING BOTTOM-SIDE OEL LAYER AN...