Hung-En Tai

Person

Taipei Hsien, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Method of managing wafer defects
- Patent number 7,412,090
- Issue date Aug 12, 2008
- Powerchip Semiconductor Corp.
- Hung-En Tai
- G01 - MEASURING TESTING
Information Patent Grant
Dispatch integration system and method based on semiconductor manuf...
- Patent number 7,218,981
- Issue date May 15, 2007
- Powerchip Semiconductor Corp.
- Yu-Wen Ho
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Semiconductor process and yield analysis integrated real-time manag...
- Patent number 7,099,729
- Issue date Aug 29, 2006
- Powerchip Semiconductor Corp.
- Hung-En Tai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Automatic intelligent yield improving and process parameter multiva...
- Patent number 7,079,677
- Issue date Jul 18, 2006
- Powerchip Semiconductor Corp.
- Hung-En Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and related system for semiconductor equipment early warning...
- Patent number 6,999,897
- Issue date Feb 14, 2006
- Powerchip Semiconductor Corp.
- Hung-En Tai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method for analyzing wafer test parameters
- Patent number 6,968,280
- Issue date Nov 22, 2005
- Powerchip Semiconductor Corp.
- Hung-En Tai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for analyzing in-line QC test parameters
- Patent number 6,959,252
- Issue date Oct 25, 2005
- Powerchip Semiconductor Corp.
- Hung-En Tai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and related system for semiconductor equipment prevention ma...
- Patent number 6,950,783
- Issue date Sep 27, 2005
- Powerchip Semiconductor Corp.
- Hung-En Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Complex multivariate analysis system and method
- Patent number 6,904,384
- Issue date Jun 7, 2005
- Powerchip Semiconductor Corp.
- Hung-En Tai
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method for analyzing final test parameters
- Patent number 6,898,539
- Issue date May 24, 2005
- Powerchip Semiconductor Corp.
- Hung-En Tai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method for analyzing defect inspection parameters
- Patent number 6,828,776
- Issue date Dec 7, 2004
- Powerchip Semiconductor Corp.
- Hung-En Tai
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
DISPATCH INTEGRATION SYSTEM AND METHOD BASED ON SEMICONDUCTOR MANUF...
- Publication number 20070129833
- Publication date Jun 7, 2007
- Powerchip Semiconductor Corp.
- Yu-Wen Ho
- G05 - CONTROLLING REGULATING
Information Patent Application
Method of Managing Wafer Defects
- Publication number 20060050950
- Publication date Mar 9, 2006
- Hung-En Tai
- G01 - MEASURING TESTING
Information Patent Application
DATA ANALYZING METHOD FOR A FAULT DETECTION AND CLASSIFICATION SYSTEM
- Publication number 20060048010
- Publication date Mar 2, 2006
- Hung-En Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND RELATED SYSTEM FOR SEMICONDUCTOR EQUIPMENT EARLY WARNING...
- Publication number 20050203715
- Publication date Sep 15, 2005
- Hung-En Tai
- G05 - CONTROLLING REGULATING
Information Patent Application
METHOD AND RELATED SYSTEM FOR SEMICONDUCTOR EQUIPMENT PREVENTION MA...
- Publication number 20050203858
- Publication date Sep 15, 2005
- Hung-En Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR PROCESS AND YIELD ANALYSIS INTEGRATED REAL-TIME MANAG...
- Publication number 20050187648
- Publication date Aug 25, 2005
- Hung-En Tai
- G05 - CONTROLLING REGULATING
Information Patent Application
METHOD FOR ANALYZING IN-LINE QC TEST PARAMETERS
- Publication number 20050004773
- Publication date Jan 6, 2005
- Hung-En Tai
- G05 - CONTROLLING REGULATING
Information Patent Application
COMPLEX MULTIVARIATE ANALYSIS SYSTEM AND METHOD
- Publication number 20040199358
- Publication date Oct 7, 2004
- Hung-En Tai
- G05 - CONTROLLING REGULATING
Information Patent Application
METHOD FOR ANALYZING WAFER TEST PARAMETERS
- Publication number 20040193381
- Publication date Sep 30, 2004
- Hung-En Tai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANAGING SEMICONDUCTOR MANUFACTURING CASES
- Publication number 20040186736
- Publication date Sep 23, 2004
- Hung-En Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR ANALYZING FINAL TEST PARAMETERS
- Publication number 20040138856
- Publication date Jul 15, 2004
- Hung-En Tai
- G05 - CONTROLLING REGULATING
Information Patent Application
METHOD FOR ANALYZING DEFECT INSPECTION PARAMETERS
- Publication number 20040124830
- Publication date Jul 1, 2004
- Hung-En Tai
- G01 - MEASURING TESTING
Information Patent Application
AN AUTOMATIC INTELLIGENT YIELD IMPROVING AND PROCESS PARAMETER MULT...
- Publication number 20040001619
- Publication date Jan 1, 2004
- Hung-En Tai
- G06 - COMPUTING CALCULATING COUNTING

Hung-En Tai

Person

Patents Grantslast 30 patents

Method of managing wafer defects

Dispatch integration system and method based on semiconductor manuf...

Semiconductor process and yield analysis integrated real-time manag...

Automatic intelligent yield improving and process parameter multiva...

Method and related system for semiconductor equipment early warning...

Method for analyzing wafer test parameters

Method for analyzing in-line QC test parameters

Method and related system for semiconductor equipment prevention ma...

Complex multivariate analysis system and method

Method for analyzing final test parameters

Method for analyzing defect inspection parameters

Patents Applicationslast 30 patents

DISPATCH INTEGRATION SYSTEM AND METHOD BASED ON SEMICONDUCTOR MANUF...

Method of Managing Wafer Defects

DATA ANALYZING METHOD FOR A FAULT DETECTION AND CLASSIFICATION SYSTEM

METHOD AND RELATED SYSTEM FOR SEMICONDUCTOR EQUIPMENT EARLY WARNING...

METHOD AND RELATED SYSTEM FOR SEMICONDUCTOR EQUIPMENT PREVENTION MA...

SEMICONDUCTOR PROCESS AND YIELD ANALYSIS INTEGRATED REAL-TIME MANAG...

METHOD FOR ANALYZING IN-LINE QC TEST PARAMETERS

COMPLEX MULTIVARIATE ANALYSIS SYSTEM AND METHOD

METHOD FOR ANALYZING WAFER TEST PARAMETERS

METHOD OF MANAGING SEMICONDUCTOR MANUFACTURING CASES

METHOD FOR ANALYZING FINAL TEST PARAMETERS

METHOD FOR ANALYZING DEFECT INSPECTION PARAMETERS

AN AUTOMATIC INTELLIGENT YIELD IMPROVING AND PROCESS PARAMETER MULT...