HUNG Q. LE

Person

AUSTIN, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Parallel slice processor having a recirculating load-store queue fo...
- Patent number 12,061,909
- Issue date Aug 13, 2024
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction handling for accumulation of register results in a micr...
- Patent number 11,755,325
- Issue date Sep 12, 2023
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel slice processor having a recirculating load-store queue fo...
- Patent number 11,734,010
- Issue date Aug 22, 2023
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction streaming using state migration
- Patent number 11,301,254
- Issue date Apr 12, 2022
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread transition management
- Patent number 11,256,507
- Issue date Feb 22, 2022
- International Business Machines Corporation
- Christopher M. Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple streams execution for hard-to-predict branches in a microp...
- Patent number 11,188,340
- Issue date Nov 30, 2021
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread-based organization of slice target register file entry in a...
- Patent number 11,157,276
- Issue date Oct 26, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel slice processor having a recirculating load-store queue fo...
- Patent number 11,150,907
- Issue date Oct 19, 2021
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Independent mapping of threads
- Patent number 11,144,323
- Issue date Oct 12, 2021
- International Business Machines Corporation
- Sam G. Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction handling for accumulation of register results in a micr...
- Patent number 11,132,198
- Issue date Sep 28, 2021
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Slice-target register file for microprocessor
- Patent number 11,119,774
- Issue date Sep 14, 2021
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoupling of conditional branches
- Patent number 11,106,466
- Issue date Aug 31, 2021
- International Business Machines Corporation
- Nicholas R. Orzol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register file write using pointers
- Patent number 11,093,282
- Issue date Aug 17, 2021
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Banked slice-target register file for wide dataflow execution in a...
- Patent number 11,093,246
- Issue date Aug 17, 2021
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction streaming using copy select vector
- Patent number 11,061,681
- Issue date Jul 13, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Saving and restoring a transaction memory state
- Patent number 10,996,995
- Issue date May 4, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable processor with load-store slices supporting reorder...
- Patent number 10,983,800
- Issue date Apr 20, 2021
- International Business Machines Corporation
- Lee Evan Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Program instruction scheduling
- Patent number 10,983,797
- Issue date Apr 20, 2021
- International Business Machines Corporation
- Christian Zoellin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementation of execution compression of instructions in slice ta...
- Patent number 10,949,205
- Issue date Mar 16, 2021
- International Business Machines Corporation
- Joshua Bowman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculatively releasing store data before store instruction complet...
- Patent number 10,929,144
- Issue date Feb 23, 2021
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative execution of both paths of a weakly predicted branch in...
- Patent number 10,901,743
- Issue date Jan 26, 2021
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling unaligned load operations in a multi-slice computer processor
- Patent number 10,884,742
- Issue date Jan 5, 2021
- International Business Machines Corporation
- Sundeep Chadha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dispatching, allocating, and deallocating instructions with real/vi...
- Patent number 10,877,763
- Issue date Dec 29, 2020
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing an issue queue for fused instructions and paired instructi...
- Patent number 10,831,498
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Michael J. Genden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic update of the number of architected registers assigned to s...
- Patent number 10,831,537
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Harold W. Cain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling unaligned load operations in a multi-slice computer processor
- Patent number 10,831,481
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Sundeep Chadha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing an issue queue for fused instructions and paired instructi...
- Patent number 10,831,501
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Michael J. Genden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction completion table containing entries that share instruct...
- Patent number 10,761,856
- Issue date Sep 1, 2020
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual compare of least-significant-bit for dependency wake up from a...
- Patent number 10,747,545
- Issue date Aug 18, 2020
- International Business Machines Corporation
- Michael J. Genden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Converting multiple instructions into a single combined instruction...
- Patent number 10,691,459
- Issue date Jun 23, 2020
- International Business Machines Corporation
- Giles R. Frazier
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INSTRUCTION HANDLING FOR ACCUMULATION OF REGISTER RESULTS IN A MICR...
- Publication number 20230367597
- Publication date Nov 16, 2023
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL SLICE PROCESSOR HAVING A RECIRCULATING LOAD-STORE QUEUE FO...
- Publication number 20230273793
- Publication date Aug 31, 2023
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION HANDLING FOR ACCUMULATION OF REGISTER RESULTS IN A MICR...
- Publication number 20220050682
- Publication date Feb 17, 2022
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL SLICE PROCESSOR HAVING A RECIRCULATING LOAD-STORE QUEUE FO...
- Publication number 20210406023
- Publication date Dec 30, 2021
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLICE-TARGET REGISTER FILE FOR MICROPROCESSOR
- Publication number 20210072992
- Publication date Mar 11, 2021
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD-BASED ORGANIZATION OF SLICE TARGET REGISTER FILE ENTRY IN A...
- Publication number 20210072993
- Publication date Mar 11, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BANKED SLICE-TARGET REGISTER FILE FOR WIDE DATAFLOW EXECUTION IN A...
- Publication number 20210072991
- Publication date Mar 11, 2021
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION HANDLING FOR ACCUMULATION OF REGISTER RESULTS IN A MICR...
- Publication number 20210064365
- Publication date Mar 4, 2021
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION STREAMING USING STATE MIGRATION
- Publication number 20210026642
- Publication date Jan 28, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION STREAMING USING COPY SELECT VECTOR
- Publication number 20210026643
- Publication date Jan 28, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAM INSTRUCTION SCHEDULING
- Publication number 20200379766
- Publication date Dec 3, 2020
- International Business Machines Corporation
- Christian Zoellin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER FILE WRITE USING POINTERS
- Publication number 20200326978
- Publication date Oct 15, 2020
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SAVING AND RESTORING A TRANSACTION MEMORY STATE
- Publication number 20200301758
- Publication date Sep 24, 2020
- International Business Machines Corporation
- Steven J. BATTLE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speculatively Releasing Stores in a Processor
- Publication number 20200249946
- Publication date Aug 6, 2020
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTATION OF EXECUTION COMPRESSION OF INSTRUCTIONS IN SLICE TA...
- Publication number 20200201639
- Publication date Jun 25, 2020
- International Business Machines Corporation
- Joshua Bowman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE STREAMS EXECUTION FOR BRANCH PREDICATION IN A MICROPROCESSOR
- Publication number 20200201646
- Publication date Jun 25, 2020
- International Business Machines Corporation
- Brian W. THOMPTO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL COMPARE OF LEAST-SIGNIFICANT-BIT FOR DEPENDENCY WAKE UP FROM A...
- Publication number 20200167166
- Publication date May 28, 2020
- International Business Machines Corporation
- MICHAEL J. GENDEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDEPENDENT MAPPING OF THREADS
- Publication number 20200073668
- Publication date Mar 5, 2020
- International Business Machines Corporation
- Sam G. Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER BACK-TO-BACK WAKE UP AND ISSUE FOR PAIRED ISSUE QUEUE IN...
- Publication number 20200042321
- Publication date Feb 6, 2020
- International Business Machines Corporation
- Michael J. Genden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dispatching, Allocating, and Deallocating Instructions in a Queue i...
- Publication number 20200042319
- Publication date Feb 6, 2020
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE EXECUTION OF BOTH PATHS OF A WEAKLY PREDICTED BRANCH IN...
- Publication number 20200026520
- Publication date Jan 23, 2020
- International Business Machines Corporation
- Kenneth L. WARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC UPDATE OF THE NUMBER OF ARCHITECTED REGISTERS ASSIGNED TO S...
- Publication number 20200026559
- Publication date Jan 23, 2020
- International Business Machines Corporation
- HAROLD W. CAIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION COMPLETION TABLE CONTAINING ENTRIES THAT SHARE INSTRUCT...
- Publication number 20200026521
- Publication date Jan 23, 2020
- International Business Machines Corporation
- Kenneth L. WARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple Level History Buffer for Transaction Memory Support
- Publication number 20200019405
- Publication date Jan 16, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED COMPARE LANES FOR DEPENDENCY WAKE UP IN A PAIR-BASED ISSUE Q...
- Publication number 20200004546
- Publication date Jan 2, 2020
- International Business Machines Corporation
- MICHAEL J. GENDEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING UNALIGNED LOAD OPERATIONS IN A MULTI-SLICE COMPUTER PROCESSOR
- Publication number 20190384602
- Publication date Dec 19, 2019
- International Business Machines Corporation
- SUNDEEP CHADHA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECOUPLING OF CONDITIONAL BRANCHES
- Publication number 20190384607
- Publication date Dec 19, 2019
- International Business Machines Corporation
- Nicholas R. Orzol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING UNALIGNED LOAD OPERATIONS IN A MULTI-SLICE COMPUTER PROCESSOR
- Publication number 20190286446
- Publication date Sep 19, 2019
- International Business Machines Corporation
- SUNDEEP CHADHA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING AN ISSUE QUEUE FOR FUSED INSTRUCTIONS AND PAIRED INSTRUCTI...
- Publication number 20190265979
- Publication date Aug 29, 2019
- International Business Machines Corporation
- MICHAEL J. GENDEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING AN ISSUE QUEUE FOR FUSED INSTRUCTIONS AND PAIRED INSTRUCTI...
- Publication number 20190265978
- Publication date Aug 29, 2019
- International Business Machines Corporation
- MICHAEL J. GENDEN
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Parallel slice processor having a recirculating load-store queue fo...

Instruction handling for accumulation of register results in a micr...

Parallel slice processor having a recirculating load-store queue fo...

Instruction streaming using state migration

Thread transition management

Multiple streams execution for hard-to-predict branches in a microp...

Thread-based organization of slice target register file entry in a...

Parallel slice processor having a recirculating load-store queue fo...

Independent mapping of threads

Instruction handling for accumulation of register results in a micr...

Slice-target register file for microprocessor

Decoupling of conditional branches

Register file write using pointers

Banked slice-target register file for wide dataflow execution in a...

Instruction streaming using copy select vector

Saving and restoring a transaction memory state

Reconfigurable processor with load-store slices supporting reorder...

Program instruction scheduling

Implementation of execution compression of instructions in slice ta...

Speculatively releasing store data before store instruction complet...

Speculative execution of both paths of a weakly predicted branch in...

Handling unaligned load operations in a multi-slice computer processor

Dispatching, allocating, and deallocating instructions with real/vi...

Managing an issue queue for fused instructions and paired instructi...

Dynamic update of the number of architected registers assigned to s...

Handling unaligned load operations in a multi-slice computer processor

Managing an issue queue for fused instructions and paired instructi...

Instruction completion table containing entries that share instruct...

Dual compare of least-significant-bit for dependency wake up from a...

Converting multiple instructions into a single combined instruction...

Patents Applicationslast 30 patents

INSTRUCTION HANDLING FOR ACCUMULATION OF REGISTER RESULTS IN A MICR...

PARALLEL SLICE PROCESSOR HAVING A RECIRCULATING LOAD-STORE QUEUE FO...

INSTRUCTION HANDLING FOR ACCUMULATION OF REGISTER RESULTS IN A MICR...

PARALLEL SLICE PROCESSOR HAVING A RECIRCULATING LOAD-STORE QUEUE FO...

SLICE-TARGET REGISTER FILE FOR MICROPROCESSOR

THREAD-BASED ORGANIZATION OF SLICE TARGET REGISTER FILE ENTRY IN A...

BANKED SLICE-TARGET REGISTER FILE FOR WIDE DATAFLOW EXECUTION IN A...

INSTRUCTION HANDLING FOR ACCUMULATION OF REGISTER RESULTS IN A MICR...

INSTRUCTION STREAMING USING STATE MIGRATION

INSTRUCTION STREAMING USING COPY SELECT VECTOR

PROGRAM INSTRUCTION SCHEDULING

REGISTER FILE WRITE USING POINTERS

SAVING AND RESTORING A TRANSACTION MEMORY STATE

Speculatively Releasing Stores in a Processor

IMPLEMENTATION OF EXECUTION COMPRESSION OF INSTRUCTIONS IN SLICE TA...

MULTIPLE STREAMS EXECUTION FOR BRANCH PREDICATION IN A MICROPROCESSOR

DUAL COMPARE OF LEAST-SIGNIFICANT-BIT FOR DEPENDENCY WAKE UP FROM A...

INDEPENDENT MAPPING OF THREADS

LOW POWER BACK-TO-BACK WAKE UP AND ISSUE FOR PAIRED ISSUE QUEUE IN...

Dispatching, Allocating, and Deallocating Instructions in a Queue i...

SPECULATIVE EXECUTION OF BOTH PATHS OF A WEAKLY PREDICTED BRANCH IN...

DYNAMIC UPDATE OF THE NUMBER OF ARCHITECTED REGISTERS ASSIGNED TO S...

INSTRUCTION COMPLETION TABLE CONTAINING ENTRIES THAT SHARE INSTRUCT...

Multiple Level History Buffer for Transaction Memory Support

SHARED COMPARE LANES FOR DEPENDENCY WAKE UP IN A PAIR-BASED ISSUE Q...

HANDLING UNALIGNED LOAD OPERATIONS IN A MULTI-SLICE COMPUTER PROCESSOR

DECOUPLING OF CONDITIONAL BRANCHES

HANDLING UNALIGNED LOAD OPERATIONS IN A MULTI-SLICE COMPUTER PROCESSOR

MANAGING AN ISSUE QUEUE FOR FUSED INSTRUCTIONS AND PAIRED INSTRUCTI...

MANAGING AN ISSUE QUEUE FOR FUSED INSTRUCTIONS AND PAIRED INSTRUCTI...